参数资料
型号: ISL61851EVAL1Z
厂商: Intersil
文件页数: 5/20页
文件大小: 0K
描述: EVAL BOARD FOR ISL61851
标准包装: 1
系列: *
ISL6185
Pin Configurations
ISL6185
(8 LD SOIC/DFN)
TOP VIEW
ISL6185
(10 LD DFN)
TOP VIEW
GND
VIN
EN1/EN1
EN2/EN2
1
2
3
4
(GND)
EPAD
DFN Only
8
7
6
5
FLT1
OUT1
OUT2
FLT2
GND
VIN
VIN
EN1/EN1
EN2/EN2
1
2
3
4
5
(GND)
EPAD
10
9
8
7
6
FLT1
OUT1
NC
OUT2
FLT2
Pin Descriptions
PIN NUMBER
8 Ld
SOIC/DFN
1
2
10 Ld DFN
1
2, 3
SYMBOL
GND
VIN
DESCRIPTION
IC ground reference.
Chip bias, Controlled Voltage Input, Undervoltage Lock Out (UVLO). VIN provides chip bias voltage. At
VIN < 1.7V chip functionality is disabled, FLT is active and floating, and OUT is held low. Range 0V to
5.5V.
3,
4
5,
8
4,
5
6,
10
EN1, E N1 /
EN2, EN2
FLT2
FLT1
Enable/Disable inputs, Active high (EN) and active low (EN) options enable the power switch. These
inputs have internal 1M Ω pull-off resistors. Range 0V to VIN.
Overcurrent Fault Indicator. FLT floats and is disabled until VIN >V UVLO . This output is pulled low after
the current limit time-out period has expired. Fault is not signaled due to over-temperature shut down.
Range 0V to VIN.
6,
7
7,
9
OUT2,
OUT1
Controlled Supply Output. Upon an OC condition, I OUT is current limited. Current limit response time is
within 200μs. This output remains in current limit for a nominal 12ms before being turned off either for
the latch or auto retry versions. Range 0V to VIN.
-
PD
8
PD
NC
EPAD
This pin is not electrically connected internally.
Thermal Dissipation Exposed PAD Range: Connect to GND.
(DFN only)
5
FN6937.3
March 8, 2012
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