参数资料
型号: ISL61852LIRZ-T
厂商: Intersil
文件页数: 16/20页
文件大小: 0K
描述: IC USB PWR CTRLR DUAL 8DFN
标准包装: 6,000
类型: 热交换开关
应用: USB 过电流保护控制器
内部开关:
电流限制: 1.5A
电源电压: 2.3 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-VDFN 裸露焊盘
供应商设备封装: 8-DFN(3x3)
包装: 带卷 (TR)
ISL6185
Application Information
Using the ISL6185xEVAL1Z Platform
General and Biasing Information
There are three evaluation platforms for the ISL6185 family.
There is one platform for each package style, each with a
different continuous output current level and a mix of enable
polarity and output retry or latch options. See page 4, at the end
of the “Ordering Information” table, for information on the
standard available evaluation board options. Figure 32A shows
the common schematic for all three evaluation boards. See “Pin
Configurations” on page 5 for details and differences.
The evaluation platform is biased and monitored through
numerous labeled test points. See Table 1 for test point
assignments and descriptions.
TABLE 1. ISL61851EVAL1Z TEST POINT ASSIGNMENTS
Application Considerations
The application considerations for the ISL6185 family are widely
accepted best industry practices. Good decoupling practices on
the VIN pin must be followed: placement close to the IC, with at
least 2.2μF recommended. It is recommended to reduce the
input and output inductance to the ISL6185 with good PCB
layout practices.
When designing with the 1.5A and 1.8A versions in an
implementation in which the output may be unloaded (open)
while the ISL6185 is turned on, a minimum of 4.7μF of
capacitive output load is recommended to prevent high dv/dt
from unnecessarily activating the surge/ESD control circuit.
The ISL6185 provides several continuous current rated devices
specified at V IN = 5V; these are 0.6A, 1.1A, 1.5A and 1.8A
options that are capable over the entire temperature extreme. At
V IN = 3.3V, the current capability is degraded, and the ISL6185 is
specified at 0.6A, 1.1A, 1.3A and 1.5A, respectively. At
TP NAME
GND
V+
EN1
EN2
FLT2
DESCRIPTION
Eval Board and IC Gnd
Eval Board and IC Bias
Enable Switch 1
Enable Switch 2
Switch 2 Fault
V IN = 2.5V, there are no minimum specifications, but a typical
value is provided for +25°C operation (see “Electrical
Specifications” on page 6). This degraded capability is due to the
higher r DS(ON) of the FET switch at the lower bias voltage.
The enhanced thermal characteristics and increased number of
bond wires allow the 10 Ld DFN to have a higher current
capability than either the 8 Ld SOIC or the DFN.
TABLE 2. ISL6185XEVAL1Z BOARD COMPONENT LISTING
OUT2
Switch Out 2
COMPONENT
COMPONENT
OUT1
FLT1
Switch Out 1
Switch 1 Fault
DESIGNATOR
U1
R3 - R4
FUNCTION
ISL6185
Output Load
COMPONENT DESCRIPTION
Intersil, ISL6185
10 Ω, 5%, 3W
Upon proper bias of the evaluation platform and correct enabling
Resistors
of the IC, the ISL6185 will have a nominal V IN /10 Ω load current
that is lower than the continuous current rating passing through
each enabled switch. See Figures 13 and 14 for typical ISL6185
turn-on and turn-off waveforms.
External current loading in excess of the trip current level for the
particular part being evaluated will result in the ISL6185 entering
the current limiting mode. Figure 16 illustrates the current
R1 - R2
C1
C2 - C3
FLT Output Pull-up
Resistor
Decoupling
Capacitor
Load Capacitor
10k Ω , 0805
2.2μF, 0805
10μF 16V Electrolytic,
Radial Lead
limiting mode for the ISL6185 product variants with 0.6A of
continuous load current rating. The scope shot shows current
limiting for ~12ms before it is turned off and the fault signal is
asserted.
For additional products, see www.intersil.com/product_tree
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
16
FN6937.3
March 8, 2012
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