参数资料
型号: ISL6219ACA-T
厂商: Intersil
文件页数: 12/17页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 28-SSOP
标准包装: 2,500
PWM 型: 电压模式
输出数: 3
频率 - 最大: 1.5MHz
占空比: 75%
电源电压: 4.75 V ~ 5.25 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -10°C ~ 85°C
封装/外壳: 28-SSOP(0.154",3.90mm 宽)
包装: 带卷 (TR)
ISL6219A
LOWER MOSFET POWER CALCULATION
01110
00110
V ID , 5V/div
VID CHANGE OCCURS
ANYWHERE HERE
The calculation for heat dissipated in the lower MOSFET is
simple, since virtually all of the heat loss in the lower
MOSFET is due to current conducted through the channel
resistance (r DS(ON) ). In Equation 7, I M is the maximum
continuous output current; I L,PP is the peak-to-peak inductor
1.5V
V REF , 100mV/div
current (see Equation 1); d is the duty cycle (V OUT /V IN ); and
L is the per-channel inductance.
? I M ? 2 I L , PP ( 1 – d )
P LOW , 1 = r DS ( ON ) ? ------ ? ( 1 – d ) + -------------------------------
? N ?
1.5V
V OUT , 100mV/div
12
(EQ. 7)
An additional term can be added to the lower-MOSFET loss
equation to account for additional loss accrued during the
5 μ s/div
FIGURE 10. DYNAMIC-VID WAVEFORMS FOR 500KHz
dead time when inductor current is flowing through the
lower-MOSFET body diode. This term is dependent on the
diode forward voltage at I M , V D(ON) ; the switching
.
ISL6219A BASED MULTI-PHASE BUCK
CONVERTER
frequency, f S ; and the length of dead times, t d1 and t d2 , at
the beginning and the end of the lower-MOSFET conduction
----- ? ? < t DV ≤ ----- ? ?
? I M I PP ?
P LOW , 2 = V D ( ON ) f S ? ------ + --------- ? t
? I M I PP ?
+ ? ------ – --------- ? t d2
1 ? 2 Δ V ID ? 1 ? 2 Δ V ID ?
----------------- – 1 -----------------
f S ? 0.025 ? f S ? 0.025 ?
(EQ. 6)
interval respectively.
? N 2 ? d1
? N 2 ?
(EQ. 8)
General Design Guide
This design guide is intended to provide a high-level
explanation of the steps necessary to create a multi-phase
power converter. It is assumed that the reader is familiar with
many of the basic skills and techniques referenced below. In
addition to this guide, Intersil provides complete reference
designs that include schematics, bills of materials, and
example board layouts for all common microprocessor
applications.
Power Stages
The first step in designing a multi-phase converter is to
determine the number of phases. This determination
depends heavily on the cost analysis which in turn depends
on system constraints that differ from one design to the next.
Principally, the designer will be concerned with whether
components can be mounted on both sides of the circuit
board; whether through-hole components are permitted on
either side; and the total board space available for power-
supply circuitry. Generally speaking, the most economical
solutions will be for each phase to handle between 15 and
20A. All-surface-mount designs will tend toward the lower
end of this current range and, if through-hole MOSFETs can
Thus the total power dissipated in each lower MOSFET is
approximated by the summation of P L and P D .
UPPER MOSFET POWER CALCULATION
In addition to r DS(ON) losses, a large portion of the upper-
MOSFET losses are due to currents conducted across the
input voltage (V IN ) during switching. Since a substantially
higher portion of the upper-MOSFET losses are dependant
on switching frequency, the power calculation is somewhat
more complex. Upper MOSFET losses can be divided into
separate components involving the upper-MOSFET
switching times; the lower-MOSFET body-diode reverse-
recovery charge, Q rr ; and the upper MOSFET r DS(ON)
conduction loss.
When the upper MOSFET turns off, the lower MOSFET does
not conduct any portion of the inductor current until the
voltage at the phase node falls below ground. Once the
lower MOSFET begins conducting, the current in the upper
MOSFET falls to zero as the current in the lower MOSFET
ramps up to assume the full inductor current. In Equation 9,
the required time for this commutation is t 1 and the
associated power loss is P UP,1 .
P UP , 1 ≈ V IN ? ------ + ------------- ? ? ---- 1 ? f S
be used, higher per-phase currents are possible. In cases
where board space is the limiting constraint, current can be
pushed as high as 30A per phase, but these designs require
? I M I L , PP ? ? t ?
? N 2 ? ? 2 ?
(EQ. 9)
heat sinks and forced air to cool the MOSFETs.
Similarly, the upper MOSFET begins conducting as soon as
MOSFETs
The choice of MOSFETs depends on the current each
MOSFET will be required to conduct; the switching frequency;
the capability of the MOSFETs to dissipate heat; and the
availability and nature of heat sinking and air flow.
12
it begins turning on. In Equation 10, this transition occurs
over a time t 2 , and the approximate the power loss is P UP,2 .
FN9093.1
March 20, 2007
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