参数资料
| 型号： | ISL6262IRZ |
| 厂商： | Intersil |
| 文件页数： | 24/27页 |
| 文件大小： | 0K |
| 描述： | IC CORE CTRLR 2PHASE 48-QFN |
| 标准包装： | 43 |
| 应用： | 转换器，Intel IMVP-6 |
| 输入电压： | 5 V ~ 25 V |
| 输出数： | 1 |
| 输出电压： | 0.3 V ~ 1.5 V |
| 工作温度： | -40°C ~ 100°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-VFQFN 裸露焊盘 |
| 供应商设备封装： | 48-QFN（7x7） |
| 包装： | 管件 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页当前第24页第25页第26页第27页
ISL6262
2.25
2.2
2.15
2.1
2.05
bigger to cover the tolerance of the inductor to prevent the
output voltage from going lower than the spec. This cap
needs to be a high grade cap like X7R with low tolerance.
There is another consideration in order to achieve better
time constant match mentioned above. The NPO/COG
(class-I) capacitors have only 5% tolerance and a very good
thermal characteristics. But those caps are only available in
small capacitance values. In order to use such capacitors,
the resistors and thermistors surrounding the droop voltage
sensing and droop amplifier has to be resized up to 10X to
0
20
40
60
80
100
reduce the capacitance by 10X. But attention has to be paid
INDUCTOR TEMPERATURE (°C)
FIGURE 35. LOAD LINE PERFORMANCE WITH NTC
THERMAL COMPENSATION
Dynamic Mode of Operation - Dynamic Droop
Using DCR Sensing
Droop is very important for load transient performance. If the
system is not compensated correctly, the output voltage
could sag excessively upon load application and potentially
create a system failure. The output voltage could also take a
long period of time to settle to its final value. This could be
problematic if a load dump were to occur during this time.
This situation would cause the output voltage to rise above
the no load setpoint of the converter and could potentially
damage the CPU.
The L/DCR time constant of the inductor must be matched to
the Rn*Cn time constant as shown in the following equation:
in balancing the impedance of droop amplifier in this case.
Dynamic Mode of Operation - Compensation
Parameters
Considering the voltage regulator as a black box with a
voltage source controlled by VID and a series impedance, in
order to achieve the 2.1mV/A load line, the impedance
needs to be 2.1m Ω . The compensation design has to target
the output impedance of the converter to be 2.1m Ω . There is
a mathematical calculation file available to the user. The
power stage parameters such as L and Cs are needed as
the input to calculate the compensation component values.
Attention has to be paid to the input resistor to the FB pin.
Too high of a resistor will cause an error to the output voltage
regulation because of bias current flowing in the FB pin. It is
better to keep this resistor below 3K when using this file.
Static Mode of Operation - Current Balance Using
DCR or Discrete Resistor Current Sensing
------------- = ---------------------------------- ? C n
R n + RS EQV
L
C n = -----------------------------------
R n ? RS EQV
L R n ? RS EQV
DCR
Solving for Cn we now have the following equation:
-------------
DCR
----------------------------------
R n + RS EQV
(EQ. 23)
(EQ. 24)
Current Balance is achieved in the ISL6262 through the
matching of the voltages present on the ISEN pins. The
ISL6262 adjusts the duty cycles of each phase to maintain
equal potentials on the ISEN pins. RL and CL around each
inductor, or around each discrete current resistor, are used
to create a rather large time constant such that the ISEN
voltages have minimal ripple voltage and represent the DC
current flowing through each channel's inductor. For
Note, RO was neglected. As long as the inductor time
constant matches the Cn, Rn and Rs time constants as
given above, the transient performance will be optimum. As
in the static droop case, this process may require a slight
adjustment to correct for layout inconsistencies. For the
example of L = 0.36μH with 0.8m Ω DCR, Cn is calculated
below.
optimum performance, RL is chosen to be 10k Ω and CL is
selected to be 0.22μF. When discrete resistor sensing is
used, a capacitor most likely needs to be placed in parallel
with RL to properly compensate the current balance circuit.
ISL6262 uses RC filter to sense the average voltage on
phase node and forces the average voltage on the phase
node to be equal for current balance. Even though the
0.36 μ H
C n = ------------------------------------------------------------------ ≈ 330nF
--------------------
0.0008
parallel ( 5.87K, 1.825K )
(EQ. 25)
ISL6262 forces the ISEN voltages to be almost equal, the
inductor currents will not be exactly equal. Take DCR current
sensing as example, two errors have to be added to find the
The value of this capacitor is selected to be 330nF. As the
inductors tend to have 20% to 30% tolerances, this cap
generally will be tuned on the board by examining the
transient voltage. If the output voltage transient has an initial
dip, lower than the voltage required by the load line, and
slowly increases back to the steady state, the cap is too
small and vice versa. It is better to have the cap value a little
24
total current imbalance. 1) Mismatch of DCR: If the DCR has
a 5% tolerance then the resistors could mismatch by 10%
worst case. If each phase is carrying 20A then the phase
currents mismatch by 20A*10% = 2A. 2) Mismatch of phase
voltages/offset voltage of ISEN pins. The phase voltages are
within 2mV of each other by current balance circuit. The
error current that results is given by 2mV/DCR. If
DCR = 1m Ω then the error is 2A.
FN9199.2
May 15, 2006
相关PDF资料 |
PDF描述 |
|---|---|
| ISL6263AIRZ | IC PWN CTRLR SYNC BUCK 32QFN |
| ISL6263BHRZ | IC DC/DC BUCK CTRLR 1PH 32-QFN |
| ISL6263CHRZ-T | IC VOLT REG 1PH 5BIT VID 32-QFN |
| ISL6263CRZ | IC VREG CORE 5BIT 1PHASE 32-QFN |
| ISL6263DHRZ | IC VREG 3BIT 1PHASE 32-QFN |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6262IRZ-T | 功能描述:直流/直流开关调节器 TWO-PHS DC/DC BUCK CNTRLR IMVP-6 4 8LD RoHS:否 制造商:International Rectifier 最大输入电压:21 V 开关频率:1.5 MHz 输出电压:0.5 V to 0.86 V 输出电流:4 A 输出端数量: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:PQFN 4 x 5 |
| ISL6263 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:5-Bit VID Single-Phase Voltage Regulator for IMVP-6 Santa Rosa GPU Core |
| ISL6263A | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:5-Bit VID Single-Phase Voltage Regulator with Power Monitor for IMVP-6 Santa Rosa GPU Core |
| ISL6263ACRZ | 功能描述:直流/直流开关调节器 ONE-PHS INT DC/DC BUCK CNTRLR IMVP-6 RoHS:否 制造商:International Rectifier 最大输入电压:21 V 开关频率:1.5 MHz 输出电压:0.5 V to 0.86 V 输出电流:4 A 输出端数量: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:PQFN 4 x 5 |
| ISL6263ACRZ-T | 功能描述:直流/直流开关调节器 ONE-PHS INT DC/DC BUCK CNTRLR IMVP-6 RoHS:否 制造商:International Rectifier 最大输入电压:21 V 开关频率:1.5 MHz 输出电压:0.5 V to 0.86 V 输出电流:4 A 输出端数量: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:PQFN 4 x 5 |
发布紧急采购，3分钟左右您将得到回复。