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参数资料
| 型号： | ISL6268CAZ-T |
| 厂商： | Intersil |
| 文件页数： | 9/14页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM 16-QSOP |
| 标准包装： | 2,500 |
| 系列： | Robust Ripple Regulator™ (R³) |
| PWM 型： | 控制器 |
| 输出数： | 1 |
| 频率 - 最大： | 600kHz |
| 电源电压： | 7 V ~ 25 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -10°C ~ 100°C |
| 封装/外壳： | 16-SSOP（0.154"，3.90mm 宽） |
| 包装： | 带卷 (TR) |
ISL6268
VCC_THF . All other protection circuits function normally
the PHASE and GND pins is nulled by the voltage dropped
across R SEN as I SEN conducts through it. An OCP fault
occurs if I SEN rises above the OCP threshold current I OC
while attempting to null the negative voltage across the
PHASE and GND pins. I SEN must exceed I OC on all the
PWM pulses that occur within 20μs. If I SEN falls below I OC
on a PWM pulse before 20μs has elapsed, the timer will be
reset. An SCP fault will occur within 10μs when I SEN
exceeds twice I OC. The relationship between I D and I SEN is
written as:
state that suspends the PWM , forcing the LG and UG
gate-driver outputs low. The status of the PGOOD pin does
not change nor does the converter latch-off. The PWM
remains suspended until the IC temperature falls below the
hysteresis temperature T OTHYS at which time normal PWM
operation resumes. The OTP state can be reset if the EN pin
is pulled below the falling EN threshold voltage V ENTHF or if
V CC decays below the falling POR threshold voltage
V
during OTP. It is likely that the IC will detect an UVP fault
? I
+ --------- ? ? OC SP ? r DS ( on )
I OC
I SEN ? R SEN = I D ? r DS ( on )
The value of R SEN is then written as:
I PP
? FL 2 ?
R SEN = --------------------------------------------------------------------------
(EQ. 3)
(EQ. 4)
because in the absence of PWM, the output voltage
immediately decays below the undervoltage threshold V UV ;
the PGOOD pin will pull down to 95 ? and latch-off the
converter. The UVP fault will remain latched until the EN pin
has been pulled below the falling EN threshold voltage
V ENTHF or if V CC has decayed below the falling POR
threshold voltage VVCC_THF .
where:
- R SEN ( ? ) is the resistor used to program the overcurrent
setpoint
- I SEN is the current sense current that is sourced from the
ISEN pin
- I OC is the I SEN threshold current sourced from the ISEN
pin that will activate the OCP circuit
- I FL is the maximum continuous DC load current
- I PP is the inductor peak-to-peak ripple current
- OC SP is the desired overcurrent setpoint expressed as a
Programming the Output Voltage
When the converter is in regulation there will be 600mV from
the FB pin to the GND pin. Connect a two-resistor voltage
divider across the VO pin and the GND pin with the output
node connected to the FB pin. Scale the voltage-divider
network such that the FB pin is 600mV with respect to the
GND pin when the converter is regulating at the desired
output voltage. The output voltage can be programmed from
600mV to 3.3V.
Programming the output voltage is written as:
R TOP + R BOTTOM
multiplier relative to I FL
Overvoltage Protection
R BOTTOM
V REF = V OUT ? ---------------------------------------------------
(EQ. 5)
When an OVP fault is detected, the PGOOD pin will pull
down to 63 ? and latch-off the converter. The OVP fault will
remain latched until the EN pin has been pulled below the
falling EN threshold voltage V ENTHF or if V CC has decayed
below the falling POR threshold voltage VVCC_THF .
The OVP fault detection circuit triggers after the voltage
across the FB and GND pins has increased above the rising
overvoltage threshold V OVR. After the converter has
latched-off in response to an OVP fault, the LG gate-driver
output will retain the ability to toggle the low-side MOSFET
on and off in response to the output voltage transversing the
V OVR and V OVF thresholds.
where:
- V OUT is the desired output voltage of the converter
- V REF is the voltage that the converter regulates to
between the FB pin and the GND pin
- R TOP is the voltage-programming resistor that connects
from the FB pin to the VO pin. In addition to setting the
output voltage, this resistor is part of the loop
compensation network
- R BOTTOM is the voltage-programming resistor that
connects from the FB pin to the GND pin
Beginning with R TOP between 1k ? to 5k ?, calculating
R BOTTOM is written as:
R BOTTOM = -------------------------------------
Undervoltage Protection
When a UVP fault is detected, the PGOOD pin will pull down
to 95 ? and latch-off the converter. The fault will remain
latched until the EN pin has been pulled below the falling EN
threshold voltage V ENTHF or if V CC has decayed below the
falling POR threshold voltage VVCC_THF . The UVP fault
detection circuit triggers after the voltage across the FB and
GND pins has fallen below the undervoltage threshold V UV .
Over-Temperature
When the temperature of the ISL6268 increases above the
rising threshold temperature T OTR , the IC will enter an OTP
9
V REF ? R TOP
V OUT – V REF
(EQ. 6)
FN6348.0
August 22, 2006
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6268EVAL1Z | 功能描述:EVALUATION BOARD FOR ISL6268 RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:Robust Ripple Regulator™ (R³) 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:True Shutdown™ 主要目的:DC/DC，步升 输出及类型:1，非隔离 功率 - 输出:- 输出电压:- 电流 - 输出:1A 输入电压:2.5 V ~ 5.5 V 稳压器拓扑结构:升压 频率 - 开关:3MHz 板类型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
| ISL6269 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:High-Performance Notebook PWM Controller with Audio-Frequency Clamp |
| ISL6269_06 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:High-Performance Notebook PWM Controller with Bias Regulator and Audio-Frequency Clamp |
| ISL6269A | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:High-Performance Notebook PWM Controller |
| ISL6269ACRZ | 功能描述:IC REG CTRLR BUCK PWM 16-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:Robust Ripple Regulator™ (R³) 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
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