参数资料
| 型号： | ISL62771HRTZ-T |
| 厂商： | Intersil |
| 文件页数： | 28/36页 |
| 文件大小： | 0K |
| 描述： | IC PWM CTRLR MULTIPHASE 40TQFN |
| 标准包装： | 6,000 |
| 系列： | Robust Ripple Regulator™ (R³) |
| 应用： | 控制器，AMD Fusion? SVI 2.0 CPU GPU |
| 输入电压： | 4.5 V ~ 25 V |
| 输出数： | 2 |
| 输出电压： | 0.006 V ~ 1.55 V |
| 工作温度： | -10°C ~ 100°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 40-WFQFN 裸露焊盘 |
| 供应商设备封装： | 40-TQFN-EP（5x5） |
| 包装： | 带卷 (TR) |
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ISL62771
ISUM+
i o
Rntcs
Rp
Cn.1
+
Cn.2 Vcn
Vo
Rntc
Rn
-
FIGURE 21. DESIRED LOAD TRANSIENT RESPONSE WAVEFORMS
i o
OPTIONAL
Ri
Rip
Cip
ISUM-
OPTIONAL
FIGURE 25. OPTIONAL CIRCUITS FOR RING-BACK REDUCTION
Vo
FIGURE 22. LOAD TRANSIENT RESPONSE WHEN C n IS TOO SMALL
i o
Vo
FIGURE 23. LOAD TRANSIENT RESPONSE WHEN C n IS TOO LARGE
Figure 24 on page 28 shows the output voltage ring-back
problem during load transient response. The load current i o has a
fast step change, but the inductor current i L cannot accurately
follow. Instead, i L responds in first-order system fashion due to
the nature of the current loop. The ESR and ESL effect of the
output capacitors makes the output voltage V o dip quickly upon
load current change. However, the controller regulates V o
according to the droop current i droop , which is a real-time
representation of i L ; therefore, it pulls V o back to the level
dictated by i L , causing the ring-back problem. This phenomenon
is not observed when the output capacitor has very low ESR and
ESL, as is the case with all ceramic capacitors.
Figure 25 shows two optional circuits for reduction of the
ring-back. C n is the capacitor used to match the inductor time
constant. It usually takes the parallel of two (or more) capacitors
to get the desired value. Figure 25 shows that two capacitors
i o
RING
BACK
i L
Vo
(C n.1 and C n.2 ) are in parallel. Resistor R n is an optional
component to reduce the V o ring-back. At steady state,
C n.1 + C n.2 provides the desired C n capacitance. At the beginning
of i o change, the effective capacitance is less because R n
increases the impedance of the C n.1 branch. As Figure 22 shows,
V o tends to dip when C n is too small, and this effect reduces the
V o ring-back. This effect is more pronounced when C n.1 is much
larger than C n.2 . It is also more pronounced when R n is bigger.
However, the presence of R n increases the ripple of the V n signal
if C n.2 is too small. It is recommended to keep C n.2 greater than
2200pF. R n value usually is a few ohms. C n.1 , C n.2 and R n values
should be determined through tuning the load transient response
FIGURE 24. OUTPUT VOLTAGE RING-BACK PROBLEM
28
waveforms on an actual board.
R ip and C ip form an R-C branch in parallel with R i , providing a lower
impedance path than R i at the beginning of i o change. R ip and C ip
do not have any effect at steady state. Through proper selection of
R ip and C ip values, i droop can resemble i o rather than i L , and V o will
not ring back. The recommended value for R ip is 100 Ω . C ip should
be determined through tuning the load transient response
waveforms on an actual board. The recommended range for C ip is
100pF~2000pF. However, it should be noted that the R ip -C ip branch
may distort the i droop waveform. Instead of being triangular as the
real inductor current, i droop may have sharp spikes, which may
adversely affect i droop average value detection and therefore may
affect OCP accuracy. User discretion is advised.
FN8321.2
September 12, 2013
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL62771IRTZ | 功能描述:IC PWM CTRLR MULTIPHASE 40TQFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:Robust Ripple Regulator™ (R³) 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,000 系列:- 应用:电源，ICERA E400，E450 输入电压:4.1 V ~ 5.5 V 输出数:10 输出电压:可编程 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:42-WFBGA，WLCSP 供应商设备封装:42-WLP 包装:带卷 (TR) |
| ISL62771IRTZ-T | 功能描述:IC PWM CTRLR MULTIPHASE 40TQFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:Robust Ripple Regulator™ (R³) 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL62773 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Multiphase PWM Regulator for AMD Fusiona?￠ Desktop CPUs Using SVI 2.0 |
| ISL62773HRZ | 功能描述:电流型 PWM 控制器 MULTI-OUTPUT CNTRLR FOR AMD FUSION UP RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14 |
| ISL62773HRZ-T | 功能描述:电流型 PWM 控制器 MULTI-OUTPUT CNTRLR FOR AMD FUSION UP RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14 |
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