参数资料
| 型号： | ISL6277HRZ |
| 厂商： | Intersil |
| 文件页数： | 9/37页 |
| 文件大小： | 0K |
| 描述： | IC PWM REG MULTIPH AMD 48-QFN |
| 标准包装： | 50 |
| 应用： | 控制器，AMD Fusion? SVI 2.0 CPU GPU |
| 输入电压： | 4.5 V ~ 25 V |
| 输出数： | 2 |
| 输出电压： | 0.006 V ~ 1.55 V |
| 工作温度： | -10°C ~ 100°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-VFQFN 裸露焊盘 |
| 供应商设备封装： | 48-QFN（6x6） |
| 包装： | 托盘 |
第1页第2页第3页第4页第5页第6页第7页第8页当前第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页
ISL6277
Pin Descriptions (Continued)
PIN NUMBER
37
38
39
40
41
42
43
44
45
46
47
48
SYMBOL
UGATEX
PHASEX
LGATEX
PWM2_NB
FCCM_NB
PGOOD_NB
COMP_NB
FB_NB
VSEN_NB
ISUMN_NB
ISUMP_NB
ISEN1_NB
GND (Bottom Pad)
DESCRIPTION
High-side MOSFET gate driver portion of the programmable internal driver used for either Channel 3 of
the Core VR or Channel 1 of the Northbridge VR based on the configuration state selected by the
FCCM_NB resistor. Connect the UGATEX pin to the gate of the high-side MOSFET(s) for either Phase 3 of
the Core VR or Phase 1 of the Northbridge VR based on the configuration state selected.
Phase connection of the programmable internal driver used for either Channel 3 of the Core VR or
Channel 1 of the Northbridge VR based on the configuration state selected by the FCCM_NB resistor.
Current return path for the high-side MOSFET gate driver of the floating internal driver. Connect the
PHASEX pin to the node consisting of the high-side MOSFET source, the low-side MOSFET drain, and the
output inductor of either Phase 3 of the Core VR or Phase 1 of the Northbridge VR based on the
configuration state selected.
Low-side MOSFET gate driver portion of floating internal driver used for either Channel 3 of the Core VR
or Channel 1 of the Northbridge VR based on the configuration state selected by the FCCM_NB resistor.
Connect the LGATEX pin to the gate of the low-side MOSFET(s) for either Phase 3 of the Core VR or Phase
1 of the Northbridge VR based on the configuration state selected.
PWM output for Channel 2 of the Northbridge VR. Disabled when ISEN2_NB is tied to +5V.
Diode emulation control signal for Intersil MOSFET Drivers. When FCCM_NB is LOW, diode emulation at
the driver this pin connects to is allowed. A resistor from FCCM_NB pin to GND configures the PWM_Y
and floating internal gate driver [BOOTX, UGATEX, PHASEX, LGATEX pins] to support Phase 3 of the Core
VR and Phase 1 of the Northbridge VR. The FCCM_NB resistor value also is used to set the slew rate for
the Core VR and Northbridge VR.
Open-drain output to indicate the Northbridge portion of the IC is ready to supply regulated voltage.
Pull-up externally to VDDP or 3.3V through a resistor.
Northbridge VR error amplifier output. A resistor from COMP_NB to GND sets the Northbridge VR offset
voltage and is used to set the switching frequency for the Core VR and Northbridge VR.
Output voltage feedback to the inverting input of the Northbridge controller error amplifier.
Output voltage sense pin for the Northbridge controller. Connect to the +sense pin of the microprocessor
die.
Inverting input of the transconductance amplifier for current monitor and load line of the Northbridge VR.
Non-inverting input of the transconductance amplifier for current monitor and load line of the
Northbridge VR.
Individual current sensing for Channel 1 of the Northbridge VR. If ISEN2_NB is tied to +5V, this pin cannot
be left open and must be tied to GND with a 10k ? resistor. If ISEN1_NB is tied to +5V, the Northbridge
portion of the IC is shutdown.
Signal common of the IC. Unless otherwise stated, signals are referenced to the GND pin.
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
ISL6277HRZ
ISL6277IRZ
PART
MARKING
ISL6277 HRZ
ISL6277 IRZ
TEMP.
RANGE (°C)
-10 to +100
-40 to +85
PACKAGE
(Pb-free)
48 Ld 6x6 QFN
48 Ld 6x6 QFN
PKG.
DWG. #
L48.6x6B
L48.6x6B
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL6277 . For more information on MSL please see tech brief TB363 .
9
FN8270.1
March 8, 2012
相关PDF资料 |
PDF描述 |
|---|---|
| ISL62870HRUZ-T | IC REG CTRLR BUCK PWM 16-TQFN |
| ISL62872HRUZ-T | IC REG CTRLR BUCK PWM 20-TQFN |
| ISL62873HRUZ-T | IC REG CTRLR BUCK PWM 16UTQFN |
| ISL62875HRUZ-T | IC REG CTRLR BUCK PWM 20UTQFN |
| ISL62881CIRTZ | IC REG PWM SGL PHASE 28TQFN |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6277HRZ-T | 功能描述:IC PWM REG MULTIPH AMD 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6277IRZ | 功能描述:IC PWM REG MULTIPH AMD 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6277IRZ-T | 功能描述:IC PWM REG MULTIPH AMD 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL62810AHRUZ-T | 制造商:Intersil Corporation 功能描述:0/2-BIT PWM GPU CONTROLLER FOR NOTEBOOK. 20 LD 3.2 X 1.8 UTQ - Tape and Reel 制造商:Intersil 功能描述:0/2 BIT PWM GPU CONTLR FOR NOTEBOOK |
| ISL62810HRUZ-T | 制造商:Intersil Corporation 功能描述:0/2-BIT PWM GPU CONTROLLER FOR NOTEBOOK. 16LD 2.6 X 1.8 UTQF - Tape and Reel 制造商:Intersil 功能描述:0/2 BIT PWM GPU CONTLR FOR NOTEBOOK |
发布紧急采购，3分钟左右您将得到回复。