参数资料
型号: ISL62881CIRTZ-T
厂商: Intersil
文件页数: 3/37页
文件大小: 0K
描述: IC REG PWM SGL PHASE 28TQFN
标准包装: 6,000
应用: 控制器,Intel IMVP-6.5?
输入电压: 4.5 V ~ 25 V
输出数: 1
输出电压: 0.013 V ~ 1.5 V
工作温度: -40°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 28-WFQFN 裸露焊盘
供应商设备封装: 28-TQFN-EP(4x4)
包装: 带卷 (TR)
配用: ISL62881CCPUEVAL2Z-ND - EVAL BOARD ISL62881CCPU 28QFN
ISL62881C, ISL62881D
Pin Function Description (Continued)
ISL62881C ISL62881D
SYMBOL
DESCRIPTION
4
6
VW
A resistor from this pin to COMP programs the switching frequency (8k Ω gives
approximately 300kHz).
5
7
COMP
This pin is the output of the error amplifier. Also, a resistor across this pin and GND
adjusts the overcurrent threshold.
6
7
8
9, 10
8
9
10
11, 12
FB
VSEN
RTN
ISUM- and
This pin is the inverting input of the error amplifier.
Remote core voltage sense input. Connect to microprocessor die.
Remote voltage sensing return. Connect to ground at microprocessor die.
Droop current sense input.
ISUM+
11
12
13
13
14
15
VDD
VIN
IMON
5V bias power.
Power stage supply voltage, used for feed-forward.
An analog output. IMON outputs a current proportional to the regulator output
current.
14
16
BOOT
Connect an MLCC capacitor across the BOOT and the PHASE pin. The boot capacitor
is charged through an internal boot diode connected from the VCCP pin to the BOOT
pin, each time the PHASE pin drops below VCCP minus the voltage dropped across the
internal boot diode.
15
17
UGATE
Output of the high-side MOSFET gate driver. Connect the UGATE pin to the gate of the
high-side MOSFET.
16
18
PHASE
Current return path for the high-side MOSFET gate driver. Connect the PHASE pin to
the node consisting of the high-side MOSFET source, the low-side MOSFET drain, and
the output inductor.
17
19
VSSP
Current return path for the low-side MOSFET gate driver. Connect the VSSP pin to the
source of the low-side MOSFET through a low impedance path, preferably in parallel
with the traces connecting the LGATE pins to the gates of the low-side MOSFET.
18
-
LGATE
Output of the low-side MOSFET gate driver. Connect the LGATE1 pin to the gate of the
Phase-1 low-side MOSFET.
-
20
LGATEa
Output of the low-side MOSFET gate driver that is always active. Connect the LGATEa
pin to the gate of the low-side MOSFET that is active all the time.
-
21
LGATEb
Another output of the low-side MOSFET gate driver. This gate driver will be pulled low
when the DPRSLPVR pin logic is high. Connect the LGATEb pin to the gate of the
low-side MOSFET that is idle in deeper sleep mode.
19
22
VCCP
Input voltage bias for the internal gate drivers. Connect +5V to the VCCP pin.
Decouple with at least 1μF of an MLCC capacitor to the VSSP pin.
20, 21, 22,
23, 24, 25,
26
23, 24, 25,
26, 27, 28
29
VID0,
VID1,
VID2,
VID input with VID0 = LSB and VID6 = MSB.
VID3,
VID4,
VID5, VID6
27
30
VR_ON
Voltage regulator enable input. A high level logic signal on this pin enables the
regulator.
28
31
DPRSLPVR
Deeper sleep enable signal. A high level logic signal on this pin indicates that the
microprocessor is in deeper sleep mode.
pad
BOTTOM
3
The bottom pad is electrically connected to the GND pin inside the IC. It should also
be used as the thermal pad for heat removal.
FN7596.0
March 8, 2010
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