参数资料
型号: ISL6308ACRZ-T
厂商: Intersil
文件页数: 5/28页
文件大小: 0K
描述: IC CTRLR PWM BUCK 3PHASE 40-QFN
标准包装: 4,000
应用: 控制器,DDR
输入电压: 5 V ~ 12 V
输出数: 1
输出电压: 0.6 V ~ 2.3 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 40-VFQFN 裸露焊盘
供应商设备封装: 40-QFN(6x6)
包装: 带卷 (TR)
ISL6308A
Absolute Maximum Ratings
Thermal Information
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6V
Thermal Resistance
θ JA (°C/W)
θ JC (°C/W)
Supply Voltage, PVCC . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +15V
Absolute Boot Voltage, V BOOT . . . . . . . . GND - 0.3V to GND + 36V
Phase Voltage, V PHASE . . . . . . . . GND - 0.3V to 15V (PVCC = 12)
GND - 8V (<400ns, 20μJ) to 24V (<200ns, V BOOT-PHASE = 12V)
Upper Gate Voltage, V UGATE . . . . V PHASE - 0.3V to V BOOT + 0.3V
QFN Package (Notes 1, 2) . . . . . . . . . . 32 3.5
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
V PHASE - 3.5V (<100ns Pulse Width, 2μJ) to V BOOT + 0.3V
Lower Gate Voltage, V LGATE . . . . . . . . GND - 0.3V to PVCC + 0.3V
GND - 5V (<100ns Pulse Width, 2μJ) to PVCC+ 0.3V
Input, Output, or I/O Voltage . . . . . . . . . GND - 0.3V to VCC + 0.3V
Recommended Operating Conditions
VCC Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V ±5%
PVCC Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . +5V to 12V ±5%
Ambient Temperature (ISL6308ACRZ) . . . . . . . . . . . . 0°C to +70°C
Ambient Temperature (ISL6308AIRZ) . . . . . . . . . . . .-40°C to +85°C
CAUTION: Stress above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational section of this specification is not implied.
NOTES:
1. θ JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
2. For θ JC , the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
Recommended Operating Conditions, Unless Otherwise Specified. Parameters with MIN and/or MAX limits are
100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are
not production tested.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
BIAS SUPPLY AND INTERNAL OSCILLATOR
Input Bias Supply Current
Gate Drive Bias Current
I VCC ; ENLL = high
I PVCC ; ENLL = high; all gate outputs open,
12
0.4
15
0.8
18
1.2
mA
mA
F sw = 250kHz
VCC POR (Power-On Reset) Threshold
PVCC POR (Power-On Reset) Threshold
Oscillator Frequency
Oscillator Ramp Amplitude (Note 3)
Maximum Duty Cycle (Note 3)
VCC Rising
VCC Falling
PVCC Rising
PVCC Falling
Fsw
V P-P
4.25
3.75
4.25
3.75
225
-
-
4.38
3.88
4.38
3.88
250
1.50
66.6
4.47
4.00
4.47
4.00
275
-
-
V
V
V
V
kHz
V
%
CONTROL THRESHOLDS
ENLL Rising Threshold
ENLL Hysteresis
0.595
28
0.630
35
0.670
43
V
mV
ENLL Pull-Up current
COMP Shutdown Threshold
ENLL = 1V
COMP Falling
-0.5
0.1
-1.4
0.25
-3.0
0.4
μA
V
REFERENCE AND DAC
System Accuracy (DAC = 0.6V, 0.9V)
System Accuracy (DAC = 1.2V, 1.50V)
DAC Input Low Voltage (REF0, REF1)
DAC Input High Voltage (REF0, REF1)
Minimum External Reference (Note 4)
DROOP connected to IREF
DROOP connected to IREF
REF pin input
-0.8
-0.5
-
0.8
-
-
-
-
-
0.6
0.8
0.5
0.4
-
-
%
%
V
V
V
5
FN6669.0
September 9, 2008
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