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| 型号： | ISL6414IRZ-TK |
| 厂商： | Intersil |
| 文件页数： | 10/12页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO TRPL OUTP 16QFN |
| 标准包装： | 1,000 |
| 稳压器拓扑结构： | 正，固定式 |
| 输出电压： | 1.8V，2.84V，2.84V |
| 输入电压： | 3 V ~ 3.6 V |
| 电压 - 压降（标准）： | -，0.125V @ 300mA，0.1V @ 200mA |
| 稳压器数量： | 3 |
| 电流 - 输出： | 500mA （最小），300mA （最小），200mA （最小） |
| 电流 - 限制（最小）： | 550mA，330mA，250mA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | * |
| 封装/外壳： | * |
| 供应商设备封装： | * |
| 包装： | * |
ISL6414
Output Voltages
The ISL6414 provides fixed output voltages for use in
Wireless Chipset applications. Internal trimmed resistor
networks set the typical output voltages as shown here:
V OUT1 = 1.8V; V OUT2 = 2.84V; V OUT3 = 2.84V.
Shutdown
Driving the SHDN input LOW puts both LDO1 and LDO2 in
shutdown mode. Driving the SHDN3 input LOW puts LDO3
in shutdown mode. Pulling the SHDN and SHDN3 pins LOW
simultaneously, puts the complete chip into shutdown mode,
and supply current drops to 5 μ A typical. Both SHDN and
SHDN3 inputs have internal pull-up resistors, so that in
normal operation the outputs are always enabled; external
pull-up resistors are not required. During shutdown mode
using the SHDN pin, the FAULT output will remain HIGH
(refer to Figure 19).
Current Limit
The ISL6414 monitors and controls the pass transistor ’s
gate voltage to limit the output current. The current limit for
LDO1 is 550mA, LDO2 is 330mA and LDO3 is 250mA. The
output can be shorted to ground without damaging the part
due to the current limit and thermal protection features.
Thermal Overload Protection
Thermal overload protection limits total power dissipation in
the ISL6414. When the junction temperature (T J ) exceeds
+150°C, the thermal sensor sends a signal to the shutdown
logic, turning off the pass transistor and allowing the IC to
cool. The pass transistor turns on again after the IC’s
junction temperature typically cools by 20°C, resulting in a
pulsed output during continuous thermal overload
conditions. Thermal overload protection protects the
ISL6414 against fault conditions. For continuous operation,
do not exceed the absolute maximum junction temperature
rating of +150°C.
Operating Region and Power Dissipation
The maximum power dissipation of ISL6414 depends on the
thermal resistance of the IC package and circuit board, the
temperature difference between the die junction and ambient
air, and the rate of air flow. The power dissipated in the
device is:
PT = P1 + P2 + P3, where
P1 = I OUT1 (V IN – V OUT1 )
P2 = I OUT2 (V IN – V OUT2 )
P3 = I OUT3 (V IN - V OUT3 )
The maximum power dissipation is:
Pmax = (T JMAX – T A )/ θ JA
Where T JMAX = 150°C, T A = ambient temperature, and θ JA
is the thermal resistance from the junction to the surrounding
environment.
10
The ISL6414 package features an exposed thermal pad on
its underside. This pad lowers the thermal resistance of the
package by providing a direct heat conduction path from the
die to the PC board. Additionally, the ISL6414’s ground
(GND/GND3) performs the dual function of providing an
electrical connection to system ground and channeling heat
away. Connect the exposed backside pad and GND to the
system ground using a large pad or ground plane, or through
multiple vias to the ground plane layer.
Reverse Input Protection
The ISL6414 has a unique protection scheme that limits the
reverse supply current to less than 1mA when V IN falls
below GND. The circuitry monitors the polarity of these two
pins, disconnecting the internal circuitry and parasitic diodes
when the applied voltage is reversed. This feature prevents
the device from overheating and damaging an improperly
installed input supply.
Integrator Circuitry
The ISL6414 uses an external 33nF compensation capacitor
for minimizing load and line regulation errors and for
lowering output noise. When the output voltage shifts due to
varying load current or input voltage, the integrator capacitor
voltage is raised or lowered to compensate for the
systematic offset at the error amplifier. Compensation is
limited to ±5% to minimize transient overshoot when the
device goes out of dropout, current limit, or thermal
shutdown.
Fault-Detection Circuitry
The FAULT pin monitors LDO1 output regulation, as well as
fault conditions such as current limit and thermal shutdown.
The FAULT output goes LOW, if the LDO1 output is out of
regulation by ±5.5% (typ.). During shutdown mode using the
SHDN pin, the FAULT output will remain HIGH (refer to
Figure 19).
Applications Information
Capacitor Selection and Regulator Stability
Capacitors are required at the ISL6414’s input and output for
stable operation over the entire load range and the full
temperature range. Use >1μF capacitor at the input of
ISL6414. The input capacitor lowers the source impedance
of the input supply. Larger capacitor values and lower ESR
provides better PSRR and line transient response. The input
capacitor must be located at a distance of not more then 0.5
inches from the V IN pins of the IC and returned to a clean
analog ground. Any good quality ceramic or tantalum can be
used as an input capacitor.
The output capacitor must meet the requirements of minimum
amount of capacitance and ESR for all three LDO’s. The
ISL6414 is specifically designed to work with small ceramic
output capacitors. The output capacitor’s ESR affects stability
and output noise. Use an output capacitor with an ESR of
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