- 您现在的位置：买卖IC网 > PDF目录17314 > ISL6420AEVAL1Z (Intersil)EVALUATION BOARD FOR ISL6240A PDF资料下载
参数资料
| 型号： | ISL6420AEVAL1Z |
| 厂商： | Intersil |
| 文件页数： | 17/21页 |
| 文件大小： | 0K |
| 描述： | EVALUATION BOARD FOR ISL6240A |
| 标准包装： | 1 |
| 主要目的： | DC/DC，步降 |
| 输出及类型： | 1，非隔离 |
| 输出电压： | 3.3V |
| 电流 - 输出： | 10A |
| 输入电压： | 5.5 ~ 28 V |
| 稳压器拓扑结构： | 降压 |
| 频率 - 开关： | 300kHz |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | ISL6420A |
ISL6420A
VIN
Compensation Break Frequency Equations
F Z1 = ----------------------------------
OSC
PWM
COMPARATOR
DRIVER
L O
V OUT
1
2 π ? R 2 ? C1
(EQ. 6)
-
F P1 = -------------------------------------------------------
2 π ? R2 ? ? ---------------------- ?
-
F Z2 = ------------------------------------------------------
F P2 = ----------------------------------
Δ V OSC
+
Z FB
V E/A
+
ERROR
AMP
DRIVER
Z IN
REFERENCE
PHASE
C O
ESR
(PARASITIC)
1
C1 ? C2
? C1 + C2 ?
1
2 π ? ( R1 + R3 ) ? C3
1
2 π ? R3 ? C3
(EQ. 7)
(EQ. 8)
(EQ. 9)
1. Pick Gain (R2/R1) for desired converter bandwidth
DETAILED COMPENSATION COMPONENTS
2. Place 1 ST Zero Below Filter’s Double Pole
C 1
C 2
R 2
Z FB
C 3
Z IN
R 3
V OUT
(~75% F LC )
3. Place 2 ND Zero at Filter’s Double Pole
4. Place 1 ST Pole at the ESR Zero
5. Place 2 ND Pole at Half the Switching Frequency
COMP
-
FB
R 1
6. Check Gain against Error Amplifier’s Open-Loop
Gain
7. Estimate Phase Margin - Repeat if Necessary
+
ISL6420A
REF
R 4
Figure 18 shows an asymptotic plot of the DC/DC
converter’s gain vs. frequency. The actual Modulator
Gain has a high gain peak due to the high Q factor of
the output filter and is not shown in Figure 18. Using
V OUT = V REF × ? 1 + ------ 1 - ?
F LC = ---------------------------------------
2 π ? L O ? C O
? R ?
? R 4 ?
FIGURE 17. VOLTAGE - MODE BUCK CONVERTER
COMPENSATION DESIGN
Modulator Break Frequency Equations
1
(EQ. 4)
the previously mentioned guidelines should give a
Compensation Gain similar to the curve plotted. The
open loop error amplifier gain bounds the
compensation gain. Check the compensation gain at
F P2 with the capabilities of the error amplifier. The Loop
Gain is constructed on the log-log graph of Figure 18
by adding the Modulator Gain (in dB) to the
Compensation Gain (in dB). This is equivalent to
multiplying the modulator transfer function to the
compensation transfer function and plotting the gain.
F ESR = ---------------------------------------------
1
2 π ? ( ESR ? C O )
(EQ. 5)
100
80
F Z1 F Z2
F P1
F P2
The compensation network consists of the error
amplifier (internal to the ISL6420A) and the
impedance networks Z IN and Z FB . The goal of the
compensation network is to provide a closed loop
transfer function with the highest 0dB crossing
frequency (f 0dB ) and adequate phase margin. Phase
margin is the difference between the closed loop phase
at f 0dB and 180°. The following equations relate the
compensation network’s poles, zeros and gain to the
components (R 1 , R 2 , R 3 , C 1 , C 2 , and C 3 ) in Figure 17.
Use the following guidelines for locating the poles and
60
40
20
0
-20
-40
-60
20LOG
(R 2 /R 1 )
MODULATOR
GAIN
10 100 1k
F LC
10k
OPEN LOOP
ERROR AMP GAIN
20LOG
(VIN/ Δ V OSC )
COMPENSATION
GAIN
CLOSED LOOP
GAIN
F ESR
100k 1M 10M
zeros of the compensation network.
17
FREQUENCY (Hz)
FIGURE 18. ASYMPTOTIC BODE PLOT OF CONVERTER
GAIN
FN9169.4
December 4, 2009
相关PDF资料 |
PDF描述 |
|---|---|
| ECM08DTBH | CONN EDGECARD 16POS R/A .156 SLD |
| ECM08DTBD | CONN EDGECARD 16POS R/A .156 SLD |
| ECM08DTAN | CONN EDGECARD 16POS R/A .156 SLD |
| ISL6406EVAL1 | EVALUATION BOARD 1 ISL6406 |
| ECM08DTAH | CONN EDGECARD 16POS R/A .156 SLD |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6420AEVAL3Z | 功能描述:EVALUATION BOARD FOR ISL6240A RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:- 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:True Shutdown™ 主要目的:DC/DC，步升 输出及类型:1，非隔离 功率 - 输出:- 输出电压:- 电流 - 输出:1A 输入电压:2.5 V ~ 5.5 V 稳压器拓扑结构:升压 频率 - 开关:3MHz 板类型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
| ISL6420AIAZ | 功能描述:IC REG CTRLR BUCK PWM VM 20-QSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:75 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:1MHz 占空比:81% 电源电压:4.3 V ~ 13.5 V 降压:是 升压:是 回扫:是 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:0°C ~ 70°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:管件 产品目录页面:1051 (CN2011-ZH PDF) 其它名称:296-2543-5 |
| ISL6420AIAZS2698 | 制造商:Intersil Corporation 功能描述:PB-FREE SYNC BUCK PWM CONT. W/ 4.5V-28V INPUT,20LD QSOP - Rail/Tube 制造商:Rochester Electronics LLC 功能描述: |
| ISL6420AIAZ-TK | 功能描述:IC REG CTRLR BUCK PWM VM 20-QSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL6420AIAZ-TKS2698 | 制造商:Intersil Corporation 功能描述:PB-FREE SYNC BUCK PWM CONT. W/ 4.5V-28V INPUT,20LD QSOP, T&R - Tape and Reel |
发布紧急采购，3分钟左右您将得到回复。