参数资料
型号: ISL6420BIAZ-TK
厂商: Intersil
文件页数: 18/21页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 20-QSOP
标准包装: 1,000
PWM 型: 电压模式
输出数: 1
频率 - 最大: 1.4MHz
占空比: 100%
电源电压: 4.5 V ~ 28 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 20-SSOP(0.154",3.90mm 宽)
包装: 带卷 (TR)
ISL6420B
The compensation gain uses external impedance
capacitors ESR. The ripple voltage and current are
Δ I L = -------------------------------- ? ----------------
V IN
networks Z FB and Z IN to provide a stable, high
bandwidth (BW) overall loop. A stable control loop has a
gain crossing with -20dB/decade slope and a phase
margin greater than 45°. Include worst case component
approximated by Equations 10 and 11:
V IN - V OUT V OUT
Fs x L
(EQ. 10)
variations when determining phase margin.
Component Selection
Guidelines
Output Capacitor Selection
An output capacitor is required to filter the output and
supply the load transient current. The filtering
requirements are a function of the switching frequency
and the ripple current. The load transient requirements
are a function of the slew rate (di/dt) and the magnitude
of the transient load current. These requirements are
generally met with a mix of capacitors and careful layout.
Modern microprocessors produce transient load rates
above 1A/ns. High frequency capacitors initially supply
the transient and slow the current load rate seen by the
bulk capacitors. The bulk filter capacitor values are
generally determined by the ESR (effective series
resistance) and voltage rating requirements rather than
actual capacitance requirements.
Δ V OUT = Δ I L ? ESR (EQ. 11)
Increasing the value of inductance reduces the ripple
current and voltage. However, larger inductance values
reduce the converter’s response time to a load transient.
One of the parameters limiting the converter’s response
to a load transient is the time required to change the
inductor current. Given a sufficiently fast control loop
design, the ISL6420B will provide either 0% or 100%
duty cycle in response to a load transient. The response
time is the time required to slew the inductor current
from an initial current value to the transient current level.
During this interval the difference between the inductor
current and the transient current level must be supplied
by the output capacitor. Minimizing the response time
can minimize the output capacitance required.
The response time to a transient is different for the
application of load and the removal of load. Equations 12
and 13 give the approximate response time interval for
application and removal of a transient load:
t RISE = --------------------------------
t FALL = -------------------------------
High frequency decoupling capacitors should be placed
as close to the power pins of the load as physically
possible. Be careful not to add inductance in the circuit
board wiring that could cancel the usefulness of these
low inductance components. Consult with the
manufacturer of the load on specific decoupling
L O × I TRAN
V IN – V OUT
L O × I TRAN
V OUT
(EQ. 12)
(EQ. 13)
requirements. For example, Intel recommends that the
high frequency decoupling for the Pentium Pro be
composed of at least forty (40) 1.0μF ceramic capacitors
in the 1206 surface-mount package.
Use only specialized low-ESR capacitors intended for
switching-regulator applications for the bulk
capacitors. The bulk capacitor’s ESR will determine
the output ripple voltage and the initial voltage drop
after a high slew-rate transient. An aluminum
electrolytic capacitor's ESR value is related to the
case size with lower ESR available in larger case sizes.
However, the equivalent series inductance (ESL) of these
capacitors increases with case size and can reduce the
usefulness of the capacitor to high slew-rate transient
loading. Unfortunately, ESL is not a specified parameter.
Work with your capacitor supplier and measure the
capacitor’s impedance with frequency to select a suitable
component. In most cases, multiple electrolytic
capacitors of small case size perform better than a single
large case capacitor.
Output Inductor Selection
The output inductor is selected to meet the output
voltage ripple requirements and minimize the converter’s
response time to the load transients. The inductor value
determines the converter’s ripple current and the ripple
voltage is a function of the ripple current and the output
18
where: I TRAN is the transient load current step, t RISE is
the response time to the application of load, and t FALL is
the response time to the removal of load. With a +5V
input source, the worst case response time can be either
at the application or removal of load and dependent upon
the output voltage setting. Be sure to check both of these
equations at the minimum and maximum output levels
for the worst case response time.
Input Capacitor Selection
Use a mix of input bypass capacitors to control the
voltage overshoot across the MOSFETs. Use small
ceramic capacitors for high frequency decoupling and
bulk capacitors to supply the current needed each time
Q 1 turns on. Place the small ceramic capacitors
physically close to the MOSFETs and between the drain
of Q 1 and the source of Q 2 .
The important parameters for the bulk input capacitor
are the voltage rating and the RMS current rating. For
reliable operation, select the bulk capacitor with voltage
and current ratings above the maximum input voltage
and largest RMS current required by the circuit. The
capacitor voltage rating should be at least 1.25 x greater
than the maximum input voltage and a voltage rating of
1.5 x is a conservative guideline. The RMS current rating
requirement for the input capacitor of a buck regulator is
approximately 1/2 the DC load current. Equation 14
FN6901.1
December 4, 2009
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