参数资料
型号: ISL6439IBZ
厂商: Intersil
文件页数: 12/15页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 14-SOIC
标准包装: 500
PWM 型: 电压模式
输出数: 1
频率 - 最大: 340kHz
占空比: 100%
电源电压: 3.3 V ~ 5 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 14-SOIC(0.154",3.90mm 宽)
包装: 管件
ISL6439, ISL6439A
must be capable of handling the surge-current at power-up.
Some capacitor series available from reputable manufacturers
are surge current tested.
MOSFET Selection/Considerations
The ISL6439 requires two N-Channel power MOSFETs.
These should be selected based upon r DS(ON) , gate supply
requirements, and thermal management requirements.
In high-current applications, the MOSFET power dissipation,
package selection and heatsink are the dominant design
Bootstrap Component Selection
External bootstrap components, a diode and capacitor, are
required to provide sufficient gate enhancement to the upper
MOSFET. The internal MOSFET gate driver is supplied by
the external bootstrap circuitry as shown in Figure 7. The
boot capacitor, C BOOT , develops a floating supply voltage
referenced to the PHASE pin. This supply is refreshed each
cycle, when D BOOT conducts, to a voltage of CPVOUT less
the boot diode drop, V D , plus the voltage rise across
Q LOWER .
factors. The power dissipation includes two loss components;
conduction loss and switching loss. The conduction losses are
the largest component of power dissipation for both the upper
and the lower MOSFETs. These losses are distributed between
the two MOSFETs according to duty factor. The switching
losses seen when sourcing current will be different from the
switching losses seen when sinking current. When sourcing
current, the upper MOSFET realizes most of the switching
ISL6439
CPVOUT
D BOOT
BOOT
UGATE
PHASE
+
V D
-
C BOOT
V IN
Q UPPER
NOTE:
losses. The lower switch realizes most of the switching losses
V G-S = V CC -V D
when the converter is sinking current (see equations on next
page). These equations assume linear voltage-current
transitions and do not adequately model power loss due the
reverse-recovery of the upper and lower MOSFET’s body
diode. The gate-charge losses are dissipated by the ISL6439
-
+
LGATE
GND
Q LOWER
NOTE:
V G-S = V CC
and don't heat the MOSFETs. However, large gate-charge
increases the switching interval, t SW which increases the
MOSFET switching losses. Ensure that both MOSFETs are
within their maximum junction temperature at high ambient
temperature by calculating the temperature rise according to
package thermal-resistance specifications. A separate heatsink
may be necessary depending upon MOSFET power, package
type, ambient temperature and air flow.
Losses while Sourcing current
FIGURE 7. UPPER GATE DRIVE BOOTSTRAP
Just after the PWM switching cycle begins and the charge
transfer from the bootstrap capacitor to the gate capacitance
is complete, the voltage on the bootstrap capacitor is at its
lowest point during the switching cycle. The charge lost on
the bootstrap capacitor will be equal to the charge
transferred to the equivalent gate-source capacitance of the
upper MOSFET as shown:
P UPPER = Io × r DS ( ON ) × D + --- ? Io × V IN × t SW × f s
2 1
2
P LOWER = Io 2 x r DS(ON) x (1 - D)
Q GATE = C BOOT × ( V BOOT1 – V BOOT2 )
(EQ. 10)
P LOWER = Io × r DS ( ON ) × ( 1 – D ) + --- ? Io × V IN × t SW × f s
Losses while Sinking current
P UPPER = Io 2 x r DS(ON) x D
2 1
2
Where: D is the duty cycle = V OUT / V IN ,
t SW is the combined switch ON and OFF time, and
f s is the switching frequency.
Given the reduced available gate bias voltage (5V), logic-
where Q GATE is the maximum total gate charge of the upper
MOSFET, C BOOT is the bootstrap capacitance, V BOOT1 is
the bootstrap voltage immediately before turn-on, and
V BOOT2 is the bootstrap voltage immediately after turn-on.
The bootstrap capacitor begins its refresh cycle when the gate
drive begins to turn-off the upper MOSFET. A refresh cycle
ends when the upper MOSFET is turned on again, which
varies depending on the switching frequency and duty cycle.
The minimum bootstrap capacitance can be calculated by
rearranging the Equation 10 and solving for C BOOT .
C BOOT = -----------------------------------------------------
level or sub-logic-level transistors should be used for both N-
MOSFETs. Caution should be exercised with devices
exhibiting very low V GS(ON) characteristics. The shoot-
through protection present aboard the ISL6439 may be
Q GATE
V BOOT1 – V BOOT2
(EQ. 11)
circumvented by these MOSFETs if they have large parasitic
impedences and/or capacitances that would inhibit the gate
of the MOSFET from being discharged below its threshold
level before the complementary MOSFET is turned on.
12
Typical gate charge values for MOSFETs considered in
these types of applications range from 20nC to 100nC.
Since the voltage drop across Q LOWER is negligible,
V BOOT1 is simply V CPVOUT - V D . A schottky diode is
FN9057.5
November 5, 2008
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ISL6439IBZ-T 功能描述:IC REG CTRLR BUCK PWM VM 14-SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC(0.154",3.90mm 宽) 包装:带卷 (TR)
ISL6439IBZ-TS2705 制造商:Intersil Corporation 功能描述:CISCO, ISL6439IBZ-T W/CONTAINER LABELING - Tape and Reel
ISL6439IR 功能描述:IC REG CTRLR BUCK PWM VM 16-QFN RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:4,000 系列:- PWM 型:电压模式 输出数:1 频率 - 最大:1.5MHz 占空比:66.7% 电源电压:4.75 V ~ 5.25 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 85°C 封装/外壳:40-VFQFN 裸露焊盘 包装:带卷 (TR)
ISL6439IR-T 功能描述:IC REG CTRLR BUCK PWM VM 16-QFN RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:4,000 系列:- PWM 型:电压模式 输出数:1 频率 - 最大:1.5MHz 占空比:66.7% 电源电压:4.75 V ~ 5.25 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 85°C 封装/外壳:40-VFQFN 裸露焊盘 包装:带卷 (TR)
ISL6439IRZ 功能描述:IC REG CTRLR BUCK PWM VM 16-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC(0.154",3.90mm 宽) 包装:带卷 (TR)