参数资料
| 型号： | ISL6443AIVZ |
| 厂商： | Intersil |
| 文件页数： | 14/19页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR SGL/STP DWN PWM 28TSSOP |
| 产品培训模块： | Solutions for Industrial Control Applications |
| 标准包装： | 50 |
| 应用： | 电源 |
| 电流 - 电源： | 2mA |
| 电源电压： | 5.6 V ~ 24 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 28-TSSOP |
| 包装： | 管件 |
ISL6443A
C2
rise above its set point. Care must be taken to ensure that
CONVERTER
R2
C1
the feedback resistor ’s current exceeds the pass transistors
leakage current over the entire temperature range.
EA
G M = 17.5dB
R1
TYPE 2 EA
The linear regulator output can be supplied by the output of
one of the PWMs. When using a PFET, the output of the
linear regulator will track the PWM supply after the PWM
output rises to a voltage greater than the threshold of the
PFET pass device. The voltage differential between the
MODULATOR
G EA = 18dB
PWM and the linear output will be the load current times the
F PO
F Z
F C
F P
r DS(ON) . Figure 18 shows the linear regulator (2.5V) start-up
waveform and the PWM (3.3V) start-up waveform.
FIGURE 17. FEEDBACK LOOP COMPENSATION
The zero frequency, the amplifier high-frequency gain, and
the modulator gain are chosen to satisfy most typical
applications. The crossover frequency will appear at the
point where the modulator attenuation equals the amplifier
high frequency gain. The only task that the system designer
has to complete is to specify the output filter capacitors to
position the load main pole somewhere within one decade
lower than the amplifier zero frequency. With this type of
compensation plenty of phase margin is easily achieved due
to zero-pole pair phase ‘boost’.
Conditional stability may occur only when the main load pole
is positioned too much to the left side on the frequency axis
due to excessive output filter capacitance. In this case, the
ESR zero placed within the 1.2kHz to 30kHz range gives
some additional phase ‘boost’. Some phase boost can also
be achieved by connecting capacitor C Z in parallel with the
upper resistor R 1 of the divider that sets the output voltage
value. Please refer to “Output Inductor Selection” and
Linear Regulator
The linear regulator controller is a transconductance
amplifier with a nominal gain of 2A/V. The N-Channel
V OUT2 1V/DIV
V OUT3 1V/DIV
FIGURE 18. LINEAR REGULATOR START-UP WAVEFORM
60
50
40
30
20
10
MOSFET output device can sink a minimum of 50mA. The
reference voltage is 0.8V. With 0V differential at it’s input, the
controller sinks 21mA of current. An external PNP transistor
0
0.79
0.80
0.81 0.82 0.83
FEEDBACK VOLTAGE (V)
0.84
0.85
or PFET pass element can be used. The dominant pole for
the loop can be placed at the base of the PNP (or gate of the
PFET), as a capacitor from emitter to base (source to gate of
a PFET). Better load transient response is achieved,
however, if the dominant pole is placed at the output, with a
capacitor to ground at the output of the regulator.
Under no-load conditions, leakage currents from the pass
transistors supply the output capacitors, even when the
transistor is off. Generally this is not a problem since the
feedback resistor drains the excess charge. However,
charge may build up on the output capacitor making V LDO
14
FIGURE 19. LINEAR CONTROLLER GAIN
Base-Drive Noise Reduction
The high-impedance base driver is susceptible to system
noise, especially when the linear regulator is lightly loaded.
Capacitively coupled switching noise or inductively coupled
EMI onto the base drive causes fluctuations in the base
current, which appear as noise on the linear regulator ’s
output. Keep the base drive traces away from the step-down
converter, and as short as possible, to minimize noise
coupling. A resistor in series with the gate drivers reduces
the switching noise generated by PWM. Additionally, a
FN6600.2
June 2, 2008
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| ISL6443AIVZ-TK | 功能描述:IC CTRLR SGL/STP DWN PWM 28TSSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 电源管理 - 专用 系列:- 应用说明:Ultrasound Imaging Systems Application Note 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:37 系列:- 应用:医疗用超声波成像，声纳 电流 - 电源:- 电源电压:2.37 V ~ 6 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:56-WFQFN 裸露焊盘 供应商设备封装:56-TQFN-EP（8x8） 包装:管件 |
| ISL6443IR | 功能描述:IC CTRLR SGL/STEP DOWN PWM 28QFN RoHS:否 类别:集成电路 (IC) >> PMIC - 电源管理 - 专用 系列:- 应用说明:Ultrasound Imaging Systems Application Note 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:37 系列:- 应用:医疗用超声波成像，声纳 电流 - 电源:- 电源电压:2.37 V ~ 6 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:56-WFQFN 裸露焊盘 供应商设备封装:56-TQFN-EP（8x8） 包装:管件 |
| ISL6443IR-T | 功能描述:IC CTRLR PWM DUAL 300KHZ 28-QFN RoHS:否 类别:集成电路 (IC) >> PMIC - 电源管理 - 专用 系列:- 应用说明:Ultrasound Imaging Systems Application Note 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:37 系列:- 应用:医疗用超声波成像，声纳 电流 - 电源:- 电源电压:2.37 V ~ 6 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:56-WFQFN 裸露焊盘 供应商设备封装:56-TQFN-EP（8x8） 包装:管件 |
| ISL6443IR-TK | 功能描述:IC CTRLR PWM DUAL 300KHZ 28-QFN RoHS:否 类别:集成电路 (IC) >> PMIC - 电源管理 - 专用 系列:- 应用说明:Ultrasound Imaging Systems Application Note 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:37 系列:- 应用:医疗用超声波成像，声纳 电流 - 电源:- 电源电压:2.37 V ~ 6 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:56-WFQFN 裸露焊盘 供应商设备封装:56-TQFN-EP（8x8） 包装:管件 |
| ISL6443IRZ | 功能描述:IC CTRLR SGL/STEP DOWN PWM 28QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 电源管理 - 专用 系列:- 应用说明:Ultrasound Imaging Systems Application Note 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:37 系列:- 应用:医疗用超声波成像，声纳 电流 - 电源:- 电源电压:2.37 V ~ 6 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:56-WFQFN 裸露焊盘 供应商设备封装:56-TQFN-EP（8x8） 包装:管件 |
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