参数资料
| 型号： | ISL6455AIRZ-TK |
| 厂商： | Intersil |
| 文件页数： | 1/12页 |
| 文件大小： | 0K |
| 描述： | IC REG TRPL SYNCH DUAL LDO 24QFN |
| 标准包装： | 1 |
| 应用： | 转换器，FPGAs |
| 输入电压： | 4.2 V ~ 5.5 V |
| 输出数： | 3 |
| 输出电压： | 0.8 V ~ 3.3 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-VFQFN 裸露焊盘 |
| 供应商设备封装： | 24-QFN（4x4） |
| 包装： | 标准包装 |
| 其它名称： | ISL6455AIRZ-TKDKR |
?
ISL6455, ISL6455A
Data Sheet
December 21, 2005
FN9196.0
Triple Output Regulator with Single
Synchronous Buck and Dual LDO
The ISL6455 is a highly integrated triple output regulator
which provides a single chip solution for FPGAs and wireless
chipset power management. The device integrates a high
efficiency synchronous buck regulator (adjustable) with two
ultra low noise LDO regulators (adjustable). Either the
ISL6455 or ISL6455A can be selected based on whether
3.3V ±10% or 5V ±10% is required as an input voltage.
The synchronous current mode control PWM regulator with
integrated N- and P-channel power MOSFET provides
adjustable voltages based on external resistor setting.
Synchronous rectification with internal MOSFETs is used to
achieve higher efficiency and reduced number of external
components. Operating frequency is typically 750kHz
allowing the use of smaller inductor and capacitor values.
The device can be synchronized to an external clock signal
in the range of 500kHz to 1MHz. The PG_PWM output
indicates loss of regulation on PWM output.
The ISL6455 also has two LDO adjustable regulators using
internal PMOS transistors as pass devices. LDO2 features
ultra low noise typically below 30μV RMS to aid VCO stability.
The EN_LDO pin controls LDO1 and LDO2 outputs. The
ISL6455 also integrates a RESET function, which eliminates
the need for additional RESET IC required in WLAN and
other applications. The IC asserts a RESET signal whenever
the V IN supply voltage drops below a preset threshold,
keeping it asserted for at least 25ms after V IN has risen
above the reset threshold. The PG_LDO output indicates
loss of regulation on either of the two LDO outputs. Other
features include overcurrent protection and thermal
shutdown for all the three outputs.
High integration and the thin Quad Flat No-lead (QFN)
package makes ISL6455 an ideal choice for powering
FPGAs and small form factor wireless cards such as
PCMCIA, mini-PCI and Cardbus-32.
Ordering Information
Features
? Fully integrated synchronous buck regulator + dual LDO
? PWM output voltage adjustable.
- 0.8V to 2.5V with ISL6455 (VIN = 3.3V)
- 0.8V to 3.3V with ISL6455A (VIN = 5.0V)
? High output current. . . . . . . . . . . . . . . . . . . . . . . . . 600mA
? Dual LDO adjustable options
- LDO1, 1.2V to Vin-0.3V (3.3Vmax). . . . . . . . . . . 300mA
- LDO2, 1.2V to Vin-0.3V (3.3Vmax). . . . . . . . . . . 300mA
? Ultra-compact DC/DC converter design
? Stable with small ceramic output capacitors and no load
? High conversion efficiency
? Low shutdown supply current
? Low dropout voltage for LDOs
- LDO1 . . . . . . . . . . . . . . . . . . 150mV (typical) at 300mA
- LDO2 . . . . . . . . . . . . . . . . . . 150mV (typical) at 300mA
? Low output voltage noise
- <30μV RMS (typical) for LDO2 (VCO supply)
? PG_LDO and PG_PWM (PWM and LDO) outputs
? Extensive circuit protection and monitoring features
- PWM overvoltage protection
- Overcurrent protection
- Shutdown
- Thermal shutdown
? Integrated RESET output for microprocessor reset
? Proven reference design for total WLAN system solution
? QFN package
- Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat
No Leads - Product Outline
- Near Chip-Scale package footprint Improves PCB
efficiency and is thinner in Profile
? Pb-free plus anneal available (RoHS compliant)
Applications
PART NUMBER*
(Note)
PART TEMP. PACKAGE
MARKING RANGE (°C) (Pb-Free)
PKG.
DWG. #
? WLAN cards
ISL6455IRZ 6455IRZ -40 to 85
ISL6455AIRZ 6455AIRZ -40 to 85
Add “-TK” or T5K suffix for tape and reel.
24 Ld QFN L24.4x4B
24 Ld QFN L24.4x4B
- PCMCIA, Cardbus32, MiniPCI cards
- Compact flash cards
? Hand-held instruments
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
Related Literature
? TB363 - Guidelines for Handling and Processing Moisture
Sensitive Surface Mount Devices (SMDs)
? TB389 - PCB Land Pattern Design and Surface Mount
Guidelines for QFN Packages
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6455EVAL1Z | 功能描述:EVALUATION BOARD FOR ISL6455 RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:- 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:True Shutdown™ 主要目的:DC/DC，步升 输出及类型:1，非隔离 功率 - 输出:- 输出电压:- 电流 - 输出:1A 输入电压:2.5 V ~ 5.5 V 稳压器拓扑结构:升压 频率 - 开关:3MHz 板类型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
| ISL6455IRZ | 功能描述:电流型 PWM 控制器 SYNC BUCK PWMG DLLDO 3 3V IN 24LD 4X4 RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14 |
| ISL6455IRZ-T5K | 功能描述:电流型 PWM 控制器 SYNC BUCK PWMG DLLDO 3 3V IN 24LD 4X4 RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14 |
| ISL6455IRZ-TK | 功能描述:电流型 PWM 控制器 SYNC BUCK PWMG DLLDO 3 3V IN 24LD 4X4 RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14 |
| ISL6504A | 制造商:Intersil Corporation 功能描述: |
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