参数资料
| 型号： | ISL6524ACBZ-T |
| 厂商： | Intersil |
| 文件页数： | 8/16页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR VRM8.5 PWM TRPL 28-SOIC |
| 标准包装： | 1,000 |
| 应用： | 控制器，Intel VRM8.5 |
| 输入电压： | 10.8 V ~ 13.2 V |
| 输出数： | 4 |
| 输出电压： | 多重 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | * |
| 封装/外壳： | 28-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | * |
| 包装： | 带卷 (TR) |
signals). An under-voltage on either linear output (VSEN2,
VSEN3, or VSEN4) is ignored until the respective UP signal
10V
ATX 12V
goes high. This allows V OUT3 and V OUT4 to increase
without fault at start-up. Following an over-current event
(OC1, UV2, or UV3 event), bringing the SS24 pin below 0.8V
ATX 5V
SS24
VTTPG
SS13
resets the over-current latch and generates a soft-started
ramp-up of the outputs 1, 2, and 3.
SS13UP
UV3
0V
3.0V
ATX 3.3V
PGOOD
OC1
OC
LATCH
S Q
INHIBIT1,2,3
V OUT4 (1.8V)
V OUT3 (1.5V)
V OUT1 (1.65V)
V OUT2 (1.2V)
4V
SS13
0.8V
SS24
SS24UP
R
COUNTER
R
SSDOWN
FAULT
LATCH
S Q
0V
T0
T1
T2
T3
T4 T5
OV
UV4
4V
POR
R
COUNTER
R Q
FAULT
TIME
FIGURE 6. SOFT-START INTERVAL
The T2 to T3 time interval is dependent upon the value of
C SS13 . The same capacitor is also responsible for the ramp-
up time of the OUT1 and OUT3 voltages. If selecting a
UV2
R
S Q
OC
LATCH
FIGURE 7. FAULT LOGIC - SIMPLIFIED SCHEMATIC
different capacitor then recommended in the circuit application
literature, consider the effects the different value will have on
the ramp-up time and inrush currents of the OUT1 and OUT3
outputs.
Fault Protection
All four outputs are monitored and protected against extreme
overload. The chip’s response to an output overload is
selective, depending on the faulting output.
An over-voltage on V OUT1 output (VSEN1) disables outputs
1, 2, and 3, and latches the IC off. An under-voltage on
V OUT4 output latches the IC off. A single over-current event
on output 1, or an under-voltage event on output 2 or 3,
increments the respective fault counters and triggers a
shutdown of outputs 1, 2, and 3, followed by a soft-start re-
start. After three consecutive fault events on either counter,
the chip is latched off. Removal of bias power resets both the
fault latch and the counters. Both counters are also reset by
a successful start-up of all the outputs.
Figure 7 shows a simplified schematic of the fault logic. The
over-current latches are set dependent upon the states of
the over-current (OC1), output 2 and 3 under-voltage (UV2,
UV3) and the soft-start signals (SS13, SS24). Window
comparators monitor the SS pins and indicate when the
respective C SS pins are fully charged to above 4.0V (UP
8
OUT1 Over-Voltage Protection
During operation, a short across the PWM upper MOSFET
(Q1) causes V OUT1 to increase. When the output exceeds
the over-voltage threshold of 120% of DACOUT, the over-
voltage comparator trips to set the fault latch and turns the
lower MOSFET (Q2) on as needed to regulate the output
voltage to the 120% threshold. This operation typically
results in the blow of the input fuse, subsequent discharge of
V OUT1 .
A separate over-voltage circuit provides protection during
the initial application of power. For voltages on the VCC pin
below the power-on reset (and above ~4V), the output level
is monitored for voltages above 1.3V. Should VSEN1 exceed
this level, the lower MOSFET, Q2, is driven on.
Over-Current Protection
All outputs are protected against excessive over-currents.
The PWM controller uses the upper MOSFET’s on-
resistance, r DS(ON) to monitor the current for protection
against a shorted output. All linear regulators monitor their
respective VSEN pins for under-voltage to protect against
excessive currents.
Figure 8 illustrates the over-current protection with an
overload on OUT1. The overload is applied at T0 and the
FN9064.1
April 8, 2005
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| ISL6524CB | 功能描述:IC CTRLR VRM8.5 PWM TRPL 28-SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,000 系列:- 应用:电源，ICERA E400，E450 输入电压:4.1 V ~ 5.5 V 输出数:10 输出电压:可编程 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:42-WFBGA，WLCSP 供应商设备封装:42-WLP 包装:带卷 (TR) |
| ISL6524CBT | 制造商:Intersil Corporation 功能描述: |
| ISL6524CB-T | 功能描述:IC CTRLR VRM8.5 PWM TRPL 28-SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,000 系列:- 应用:电源，ICERA E400，E450 输入电压:4.1 V ~ 5.5 V 输出数:10 输出电压:可编程 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:42-WFBGA，WLCSP 供应商设备封装:42-WLP 包装:带卷 (TR) |
| ISL6524CBZ | 功能描述:IC CTLR VRM8.5 PWM TRPL 28-SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:2,000 系列:- 应用:控制器，DSP 输入电压:4.5 V ~ 25 V 输出数:2 输出电压:最低可调至 1.2V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:30-TFSOP（0.173"，4.40mm 宽） 供应商设备封装:30-TSSOP 包装:带卷 (TR) |
| ISL6524CBZA | 功能描述:IC CTRLR VRM8.5 PWM TRPL 28-SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
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