参数资料
型号: ISL6530EVAL1
厂商: Intersil
文件页数: 2/9页
文件大小: 0K
描述: EVALUATION BOARD 1 ISL6530
标准包装: 1
主要目的: 特殊用途 DC/DC,DDR 存储器电源
输出及类型: 2,非隔离
功率 - 输出: 31.25W
输出电压: 2.5V,1.25V
电流 - 输出: 10A,5A
输入电压: 4.5 ~ 5.5 V
稳压器拓扑结构: 降压
频率 - 开关: 300kHz
板类型: 完全填充
已供物品:
已用 IC / 零件: ISL6530
AN9993
Start Up
There are two distinct start up methods for the V DDQ and
V TT regulators. The first method is invoked through the
application of power to the IC. The Softstart feature allows
for a controlled turn on of the outputs once the Power On
profile of the regulators with no load applied. Figure 4 shows
the shutdown of the regulators will their full loads applied.
V OCSET/SD
1V/DIV
Reset (POR) threshold of the input voltage has been
reached. Figure 1 shows the start up profile of the two
regulators in relation to the start up of the 5V input supply.
V DDQ
1V/DIV
V CC
1V/DIV
V DDQ
2.5s/DIV
V TT
1V/DIV
1V/DIV
V TT
FIGURE 3. SHUTDOWN WITH NO LOAD
1V/DIV
V OCSET/SD
1V/DIV
2ms/DIV
FIGURE 1. START UP FROM POR
The second method of start up is through the use of the
Shutdown feature. Holding the OCSET/SD pin below 0.8V
will disable both regulators by forcing both the upper and
lower MOSFETs of both regulators off. Releasing the
OCSET/SD pin allow the regulators to start up. Figure 2
show the start up profile of the two regulators with this
method.
V OCSET/SD
1V/DIV
V DDQ
1V/DIV
V TT
1V/DIV
2ms/DIV
FIGURE 2. START UP FROM SHUT DOWN
Shutdown
Shutting Down Both V DDQ and V TT
As discussed in the previous section, if the OCSET/SD pin is
pulled down and held below 0.8V, both the V DDQ and V TT
regulators will be turned off. Figure 3 shows the shutdown
2
V DDQ
1V/DIV
V TT
1V/DIV
50 μ s/DIV
FIGURE 4. SHUTDOWN WITH FULL LOAD
V TT Sleep State
The V TT regulator can be placed in a sleep state where the
output is regulated to a wider tolerance while V DDQ
continues to regulate. This is done by applying a logic high
signal to the V2_SD pin. During this state, V DDQ can support
a load while V TT cannot. This allows a very quick recovery
back into synchronous buck mode. Once removed from this
state by releasing the high signal on the V2_SD pin, the
output rapidly returns to regulation. Figure 5 illustrates the
VTT regulator going into sleep mode and Figure 6 shows the
regulator being taken out of the sleep state.
Reference Design Customization
The ISL6530/31EVAL1 board has a number of options that
will allow the designer to customize the board. One
modification that can be made is to overdrive the internal
resistor divider which sets the reference voltage for the V TT
regulator in relation to V DDQ . This may be done by
populating resistors R5 and R6, as to create a tracking ratio
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