参数资料
| 型号： | ISL6532AIRZ |
| 厂商： | Intersil |
| 文件页数： | 13/17页 |
| 文件大小： | 0K |
| 描述： | IC REG/CTRLR ACPI DUAL DDR 28QFN |
| 标准包装： | 50 |
| 应用： | 存储器，DDR/DDR2 稳压器 |
| 电流 - 电源： | 5.25mA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-VQFN 裸露焊盘 |
| 供应商设备封装： | 28-QFN（6x6） |
| 包装： | 管件 |
ISL6532A
5. Place 2 ND Pole at Half the Switching Frequency.
OSC
PWM
COMPARATOR
DRIVER
V IN
L O
V DDQ
6. Check Gain against Error Amplifier’s Open-Loop Gain.
7. Estimate Phase Margin - Repeat if Necessary.
Δ V OSC
-
+
DRIVER
PHASE
C O
Compensation Break Frequency Equations
f Z1 = ------------------------------------
f P1 = ---------------------------------------------------------
2 π x R 2 x ? ---------------------- ?
Z FB
ESR
(PARASITIC)
1
2 π x R 2 x C 2
1
? C 1 x C 2 ?
? C 1 + C 2 ?
f Z2 = -------------------------------------------------------
f P2 = ------------------------------------
V E/A
-
+
Z IN
1
2 π x ( R 1 + R 3 ) x C 3
1
2 π x R 3 x C 3
ERROR
AMP
REFERENCE
(EQ. 5)
DETAILED COMPENSATION COMPONENTS
Figure 6 shows an asymptotic plot of the DC-DC converter’s
gain vs frequency. The actual Modulator Gain has a high
C 2
C 1
R 2
Z FB
C 3
Z IN
R 3
V DDQ
gain peak due to the high Q factor of the output filter and is
not shown in Figure 6. Using the above guidelines should
give a Compensation Gain similar to the curve plotted. The
open loop error amplifier gain bounds the compensation
COMP
-
+
FB
R 4
R 1
gain. Check the compensation gain at f P2 with the
capabilities of the error amplifier. The Closed Loop Gain is
constructed on the graph of Figure 6 by adding the
Modulator Gain (in dB) to the Compensation Gain (in dB).
V DDQ = 0.8 × ? 1 + ------ 1 - ?
ERROR AMP GAIN
ISL6532A
REFERENCE
? R ?
? R 4 ?
FIGURE 5. VOLTAGE-MODE BUCK CONVERTER
COMPENSATION DESIGN AND OUTPUT
VOLTAGE SELECTION
The modulator transfer function is the small-signal transfer
function of V OUT /V E/A . This function is dominated by a DC
Gain and the output filter (L O and C O ), with a double pole
break frequency at F LC and a zero at F ESR . The DC Gain of
the modulator is simply the input voltage (V IN ) divided by the
peak-to-peak oscillator voltage Δ V OSC .
This is equivalent to multiplying the modulator transfer
function to the compensation transfer function and plotting
the gain.
The compensation gain uses external impedance networks
Z FB and Z IN to provide a stable, high bandwidth (BW)
overall loop. A stable control loop has a gain crossing with
-20dB/decade slope and a phase margin greater than 45 °.
Include worst case component variations when determining
phase margin.
100
f Z1 f Z2 f P1 f P2
80
OPEN LOOP
60
Modulator Break Frequency Equations
40
20LOG
F LC = -------------------------------------------
F ESR = --------------------------------------------
1 1
2 π x LO x CO 2 π x ESR x C O
(EQ. 4)
The compensation network consists of the error amplifier
20
0
-20
(R 2 /R 1 )
MODULATOR
GAIN
20LOG
(V IN / Δ V OSC )
COMPENSATION
GAIN
(internal to the ISL6532A) and the impedance networks Z IN
and Z FB . The goal of the compensation network is to provide
a closed loop transfer function with the highest 0dB crossing
-40
-60
10
100
1k
f LC
10k
f ESR
100k
1M
CLOSED LOOP
GAIN
10M
frequency (f 0dB ) and adequate phase margin. Phase margin
is the difference between the closed loop phase at f 0dB and
180°. The following equations relate the compensation
network’s poles, zeros and gain to the components (R 1 , R 2 ,
R 3 , C 1 , C 2 , and C 3 ) in Figure 5. Use these guidelines for
locating the poles and zeros of the compensation network:
1. Pick Gain (R 2 /R 1 ) for desired converter bandwidth.
2. Place 1 ST Zero Below Filter’s Double Pole (~75% F LC ).
3. Place 2 ND Zero at Filter’s Double Pole.
4. Place 1 ST Pole at the ESR Zero.
13
FREQUENCY (Hz)
FIGURE 6. ASYMPTOTIC BODE PLOT OF CONVERTER GAIN
Feedback Compensation - AGP LDO Controller
Figure 7 shows the AGP LDO power and control stage. This
LDO, which uses a MOSFET as the linear pass element,
requires feedback compensation to insure stability of the
system. The LDO requires compensation because of the
output impedance of the error amplifier.
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