参数资料
| 型号： | ISL6554CBZA-T |
| 厂商： | Intersil |
| 文件页数： | 11/16页 |
| 文件大小： | 0K |
| 描述： | IC PWM CORE VOLTAGE REG 20-SOIC |
| 标准包装： | 1,000 |
| 应用： | 控制器，Intel Itanium? |
| 输入电压： | 4.75 V ~ 5.25 V |
| 输出数： | 4 |
| 输出电压： | 0.95 V ~ 1.7 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 20-SOIC W |
| 包装： | 带卷 (TR) |
ISL6554
FB
R FB
R IN
C c
COMP
ERROR
AMPLIFIER
-
+
SAWTOOTH
GENERATOR
CORRECTION
+
ISL6554
COMPARATOR
-
+
PWM
CIRCUIT
PWM
HIP6601
V IN
Q2
Q1
L 01
I L
PHASE
V CORE
-
REFERENCE
DAC
DIFFERENCE
+
CURRENT
ISEN
R ISEN
SENSING
TO OTHER
CHANNELS
COMPARATOR
-
CURRENT
SENSING
FROM
OTHER
ONLY ONE OUTPUT
STAGE SHOWN
TO OVER
CURRENT
TRIP
+
-
REFERENCE
AVERAGING
CHANNELS
INDUCTOR
CURRENT(S)
FROM
OTHER
CHANNELS
FIGURE 7. SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM SHOWING CURRENT AND VOLTAGE SAMPLING
The nominal current through the R ISEN resistor should be
50 μ A at full output load current, and the nominal trip point for
overcurrent detection is 165% of that value, or 82.5 μ A.
Therefore, R ISEN = I L x r DS(ON) (Q2) / 50 μ A.
For a full load of 25A per phase, and an r DS(ON) (Q2) of
4m ? , R ISEN = 2k ? .
The overcurrent trip point would be 165% of 25A, or ~ 41A
per phase. The R ISEN value can be adjusted to change the
overcurrent trip point, but it is suggested to stay within ± 25%
of nominal.
Current Balancing
The detected currents are also used to balance the phase
currents.
Each phase’s current is compared to the average of all
phase currents, and the difference is used to create an offset
in that phase’s PWM comparator. The offset is in a direction
to reduce the imbalance.
The balancing circuit can not make up for a difference in
r DS(ON) between synchronous rectifiers. If a FET has a higher
r DS(ON) , the current through that phase will be reduced.
Figures 8 and 9 show the inductor current of a two phase
system without and with current balancing.
Inductor Current
values of the input and output voltage. Ignoring secondary
effects, such as series resistance, the peak to peak value of
the sawtooth current can be described by:
i PK-PK = (V IN x V CORE - V CORE2 ) / (L x F SW x V IN )
Where: V CORE = DC value of the output or V ID voltage
V IN = DC value of the input or supply voltage
L= value of the inductor
F SW = switching frequency
Example: For V CORE = 1.6V,
V IN = 12V,
L= 1.3 μ H,
F SW = 250kHz,
Then i PK-PK = 4.3A
The inductor, or load current, flows alternately from V IN
through Q1 and from ground through Q2. The ISL6554
samples the on-state voltage drop across each Q2 transistor
to indicate the inductor current in that phase. The voltage
drop is sampled 1/3 of a switching period, i/F SW , after Q1 is
turned OFF and Q2 is turned on. Because of the sawtooth
current component, the sampled current is different from the
average current per phase. Neglecting secondary effects,
the sampled current (I SAMPLE ) can be related to the load
current (I LT ) by:
I SAMPLE = I LT / n + (V IN V CORE -3V CORE2 ) / (6L x F SW x V IN )
The inductor current in each phase of a multi-phase Buck
converter has two components. There is a current equal to
Where:
I LT = total load current
n = the number of channels
the load current divided by the number of phases (I LT / n),
and a sawtooth current, (i PK-PK ) resulting from switching.
The sawtooth component is dependent on the size of the
inductors, the switching frequency of each phase, and the
11
Example: Using the previously given conditions, and
For I LT = 100A,
n=4
Then I SAMPLE = 25.49A
FN9003.3
February 11, 2005
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| ISL6554CBZ-T | 功能描述:IC PWM CORE VOLTAGE REG 20-SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,000 系列:- 应用:电源，ICERA E400，E450 输入电压:4.1 V ~ 5.5 V 输出数:10 输出电压:可编程 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:42-WFBGA，WLCSP 供应商设备封装:42-WLP 包装:带卷 (TR) |
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| ISL6556ACBR5208 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Intersil Corporation 功能描述: |
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