参数资料
| 型号： | ISL6563CRZ-T |
| 厂商： | Intersil |
| 文件页数： | 16/19页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR PWM MULTIPHASE 24-QFN |
| 产品培训模块： | Solutions for Industrial Control Applications |
| 标准包装： | 6,000 |
| 应用： | 控制器，Intel VRM9，VRM10，AMD Hammer 应用 |
| 输入电压： | 5 V ~ 12 V |
| 输出数： | 1 |
| 输出电压： | 0.8 V ~ 1.85 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-VFQFN 裸露焊盘 |
| 供应商设备封装： | 24-QFN（4x4） |
| 包装： | 带卷 (TR) |
ISL6563
The output inductors must be capable of assuming the entire
load current before the output voltage decreases more than
The power components should be placed first. Locate the
input capacitors close to the power switches. Minimize the
L ≤ -------------------------------- ? ( Δ V MAX – Δ I ? ESR )
( Δ I )
Δ V MAX . This places an upper limit on inductance.
4 ? C ? V OUT
2
(EQ. 23)
length of the connections between the input capacitors, C IN ,
and the power switches. Locate the output inductors and
output capacitors between the MOSFETs and the load.
Locate the high-frequency decoupling capacitors (ceramic)
2.5 ? C
L ≤ ----------------- ? ( Δ V MAX – Δ I ? ESR ) ? ( V IN – V O )
( Δ I )
While the previous equation addresses the leading edge,
Equation 24 gives the upper limit on L for cases where the
trailing edge of the current transient causes a greater output
voltage deviation than the leading edge.
(EQ. 24)
2
Normally, the trailing edge dictates the selection of L, since
duty cycles are usually less than 50%. Nevertheless, both
inequalities should be evaluated, and L should be selected
based on the lower of the two results. In all equations in this
paragraph, L is the per-channel inductance and C is the total
output bulk capacitance.
Layout Considerations
MOSFETs switch very fast and efficiently. The speed with
which the current transitions from one device to another
causes voltage spikes across the interconnecting
impedances and parasitic circuit elements. These voltage
spikes can degrade efficiency, radiate noise into the circuit
and lead to device overvoltage stress. Careful component
layout and printed circuit design minimizes the voltage
spikes in the converter. Consider, as an example, the turnoff
transition of the upper PWM MOSFET. Prior to turnoff, the
upper MOSFET was carrying channel current. During the
turnoff, current stops flowing in the upper MOSFET and is
picked up by the lower MOSFET. Any inductance in the
switched current path generates a large voltage spike during
the switching interval. Careful component selection, tight
layout of the critical components, and short, wide circuit
traces minimize the magnitude of voltage spikes.
There are two sets of critical components in a DC-DC
converter using an ISL6563 controller. The power
components are the most critical because they switch large
amounts of energy. Next are small signal components that
connect to sensitive nodes or supply critical bypassing
current and signal coupling.
Note that as the ISL6563 does not allow external adjustment
of the channel-to-channel current balancing (current
information is multiplexed across a single R ISEN resistor), it
is important to have a symmetrical layout, preferably with the
controller equidistantly located from the two power trains it
controls. Equally important are the gate drive lines (UGATE,
LGATE, PHASE): since they drive the power train MOSFETs
using short, high current pulses, it is important to size them
accordingly and reduce their overall impedance. Equidistant
placement of the controller to the two power trains also helps
keeping these traces equally long (equal impedances,
resulting in similar driving of both sets of MOSFETs).
16
as close as practicable to the decoupling target, making use
of the shortest connection paths to any internal planes, such
as vias to GND immediately next, or even onto the capacitor
solder pad.
The critical small components include the bypass capacitors
for VCC and PVCC. Locate the bypass capacitors, C BP ,
close to the device. It is especially important to locate the
components associated with the feedback circuit close to
their respective controller pins, since they belong to a high-
impedance circuit loop, sensitive to EMI pick-up. It is
important to place the R ISEN resistor close to the respective
terminal of the ISL6563.
A multi-layer printed circuit board is recommended. Figure 9
shows the connections of the critical components for one
output channel of the converter. Note that capacitors C xxIN
and C xxOUT could each represent numerous physical
capacitors. Dedicate one solid layer, usually the one
underneath the component side of the board, for a ground
plane and make all critical component ground connections
with vias to this layer. Dedicate another solid layer as a power
plane and break this plane into smaller islands of common
voltage levels. Keep the metal runs from the PHASE terminal
to inductor L OUT short. The power plane should support the
input power and output power nodes. Use copper filled
polygons on the top and bottom circuit layers for the phase
nodes. Use the remaining printed circuit layers for small signal
wiring. The wiring traces from the IC to the MOSFETs’ gates
and sources should be sized to carry at least one ampere of
current (0.02” to 0.05”).
Component Selection Guidelines
Output Capacitor Selection
The output capacitor is selected to meet both the dynamic
load requirements and the voltage ripple requirements. The
load transient a microprocessor impresses is characterized
by high slew rate (di/dt) current demands. In general,
multiple high quality capacitors of different size and dielectric
are paralleled to meet the design constraints.
Should the load be characterized by high slew rates, attention
should be particularly paid to the selection and placement of
high-frequency decoupling capacitors (MLCCs, typically
multi-layer ceramic capacitors). High frequency capacitors
supply the initially transient current and slow the load
rate-of-change seen by the bulk capacitors. The bulk filter
capacitor values are generally determined by the ESR
(effective series resistance) and capacitance requirements.
FN9126.8
June 10, 2010
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相关代理商/技术参数 |
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| ISL6563CRZ-TK | 功能描述:IC CTRLR PWM MULTIPHASE 24-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6563EVAL1 | 制造商:Intersil Corporation 功能描述:DEV TOOLS, EVAL BD - Bulk 制造商:Intersil 功能描述:ISL6563 EVALRD |
| ISL6563IR | 功能描述:电流型 PWM 控制器 2-PH RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14 |
| ISL6563IR-T | 功能描述:IC CTRLR PWM MULTIPHASE 24-QFN RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,000 系列:- 应用:电源，ICERA E400，E450 输入电压:4.1 V ~ 5.5 V 输出数:10 输出电压:可编程 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:42-WFBGA，WLCSP 供应商设备封装:42-WLP 包装:带卷 (TR) |
| ISL6563IRZ | 功能描述:电流型 PWM 控制器 P6 TWO PHS CONT INTEGRTD DRVRS DESKT RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14 |
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