参数资料
型号: ISL6565BCVZ-T
厂商: Intersil
文件页数: 25/28页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 28TSSOP
标准包装: 2,500
PWM 型: 电压模式
输出数: 1
频率 - 最大: 1.5MHz
占空比: 66.7%
电源电压: 4.75 V ~ 5.25 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: 0°C ~ 105°C
封装/外壳: 28-TSSOP(0.173",4.40mm 宽)
包装: 带卷 (TR)
ISL6565A, ISL6565B
0.3
0.2
0.1
0.3
0.2
0.1
I L,PP = 0
I L,PP = 0.25 I O
I L,PP = 0.5 I O
I L,PP = 0.75 I O
I L,PP = 0
I L,PP = 0.5 I O
I L,PP = 0.75 I O
0
0
0.2
0.4
0.6
0.8
1.0
0
0
0.2
0.4
0.6
0.8
1.0
DUTY CYCLE (V IN/ V O )
FIGURE 19. NORMALIZED INPUT-CAPACITOR RMS
CURRENT FOR 2-PHASE CONVERTER
For a two-phase design, use Figure 19 to determine the
input-capacitor RMS current requirement set by the duty
cycle, maximum sustained output current (I O ), and the ratio
of the peak-to-peak inductor current (I L,PP ) to I O . Select a
bulk capacitor with a ripple current rating which will minimize
the total number of input capacitors required to support the
RMS current calculated. The voltage rating of the capacitors
should also be at least 1.25 times greater than the maximum
input voltage. Figure 20 provides the same input RMS
current information for three phase designs respectively. Use
the same approach for selecting the bulk capacitor type and
number.
25
DUTY CYCLE (V IN/ V O )
FIGURE 20. NORMALIZED INPUT-CAPACITOR RMS
CURRENT FOR 3-PHASE CONVERTER
Low capacitance, high-frequency ceramic capacitors are
needed in addition to the input bulk capacitors to suppress
leading and falling edge voltage spikes. The spikes result
from the high current slew rate produced by the upper
MOSFET turn on and off. Select low ESL ceramic capacitors
and place one as close as possible to each upper MOSFET
drain to minimize board parasitics and maximize
suppression.
FN9135.4
December 1, 2005
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