参数资料
型号: ISL6594BCRZ-T
厂商: Intersil
文件页数: 4/10页
文件大小: 0K
描述: IC MOSFET DVR SYNC BUCK 10-DFN
标准包装: 1
配置: 高端和低端,同步
输入类型: PWM
延迟时间: 10ns
电流 - 峰: 1.25A
配置数: 1
输出数: 2
高端电压 - 最大(自引导启动): 36V
电源电压: 10.8 V ~ 13.2 V
工作温度: 0°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 10-VFDFN 裸露焊盘
供应商设备封装: 10-DFN(3x3)
包装: 标准包装
产品目录页面: 1241 (CN2011-ZH PDF)
其它名称: ISL6594BCRZ-TDKR
ISL6594A, ISL6594B
Absolute Maximum Ratings
Thermal Information
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15V
Thermal Resistance
θ JA (°C/W)
θ JC (°C/W)
Supply Voltage (PVCC) . . . . . . . . . . . . . . . . . . . . . . . . . VCC + 0.3V
BOOT Voltage (V BOOT ). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36V
Input Voltage (V PWM ) . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 7V
UGATE. . . . . . . . . . . . . . . . . . . V PHASE - 0.3V DC to V BOOT + 0.3V
V PHASE - 3.5V (<100ns Pulse Width, 2μJ) to V BOOT + 0.3V
LGATE . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V DC to V PVCC + 0.3V
GND - 5V (<100ns Pulse Width, 2μJ) to V PVCC + 0.3V
PHASE. . . . . . . . . . . . . . . GND - 0.3V DC to 15V DC (V PVCC = 12V)
GND - 8V (<400ns, 20μJ) to 30V (<200ns, VBOOT - GND < 36V)
ESD Rating
Human Body Model . . . . . . . . . . . . . . . . . . . . Class I JEDEC STD
SOIC Package (Note 1) . . . . . . . . . . . . 100 N/A
DFN Package (Notes 2, 3) . . . . . . . . . . 48 7
Maximum Junction Temperature (Plastic Package) . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Ambient Temperature Range. . . . . . . . . . . . . . . . . . . . 0°C to +85°C
Maximum Operating Junction Temperature. . . . . . . . . . . . . +125°C
Supply Voltage, V CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12V ±10%
Supply Voltage Range, PVCC . . . . . . . . . . . . . . . . 5V to 12V ±10%
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. θ JA is measured with the component mounted on a high effective thermal conductivity test board in free air.
2. θ JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
3. For θ JC , the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
Recommended Operating Conditions, Unless Otherwise Noted.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
VCC SUPPLY CURRENT
Bias Supply Current
Gate Drive Bias Current
I VCC
I VCC
I PVCC
I PVCC
(Note 4)
ISL6594A, f PWM = 300kHz, V VCC = 12V
ISL6594B, f PWM = 300kHz, V VCC = 12V
ISL6594A, f PWM = 1MHz, V VCC = 12V
ISL6594B, f PWM = 1MHz, V VCC = 12V
ISL6594A, f PWM = 300kHz, V PVCC = 12V
ISL6594B, f PWM = 300kHz, V PVCC = 12V
ISL6594A, f PWM = 1MHz, V PVCC = 12V
ISL6594B, f PWM = 1MHz, V PVCC = 12V
-
-
-
-
-
-
-
-
8
4.5
10.5
5
4
7.5
5
8.5
-
-
-
-
-
-
-
-
mA
mA
mA
mA
mA
mA
mA
mA
POWER-ON RESET AND ENABLE
VCC Rising Threshold
VCC Falling Threshold
9.35
7.35
9.8
7.6
10.0
8.0
V
V
PWM INPUT (See Timing Diagram on page 6)
Input Current
I PWM
V PWM = 3.3V
V PWM = 0V
-
-
505
-460
-
-
μA
μA
PWM Rising Threshold (Note 4)
PWM Falling Threshold (Note 4)
Typical Three-State Shutdown Window
Three-State Lower Gate Falling Threshold
Three-State Lower Gate Rising Threshold
Three-State Upper Gate Rising Threshold
Three-State Upper Gate Falling Threshold
Shutdown Hold-off Time
t TSSHD
V CC = 12V
V CC = 12V
V CC = 12V
V CC = 12V
V CC = 12V
V CC = 12V
V CC = 12V
-
-
1.23
-
-
-
-
-
1.70
1.30
-
1.18
0.76
2.36
1.96
245
-
-
1.82
-
-
-
-
-
V
V
V
V
V
V
V
ns
UGATE Rise Time
t RU
V PVCC = 12V, 3nF Load, 10% to 90%
-
26
-
ns
4
FN9157.5
December 3, 2007
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