参数资料
型号: ISL6753AAZA-T
厂商: Intersil
文件页数: 4/15页
文件大小: 0K
描述: IC REG CTRLR PWM CM/VM 16-QSOP
标准包装: 2,500
PWM 型: 电流/电压模式
输出数: 4
频率 - 最大: 2MHz
占空比: 100%
电源电压: 9 V ~ 16 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 105°C
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
包装: 带卷 (TR)
ISL6753
Absolute Maximum Ratings
Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . GND - 0.3V to +20.0V
OUTxxx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to VDD
Signal Pins . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to V REF + 0.3V
VREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 6.0V
Peak GATE Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.1A
ESD Classification
Human Body Model (Per MIL-STD-883 Method 3015.7) . . .3000V
Thermal Information
Thermal Resistance (Typical) θ JA (°C/W)
16 Lead QSOP (Note 1). . . . . . . . . . . . . . . . . . . . . . 95
Maximum Junction Temperature . . . . . . . . . . . . . . . . -55°C to 150°C
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C
(QSOP- Lead Tips Only)
Charged Device Model (Per EOS/ESD DS5.3, 4/14/93) . . .1000V
Operating Conditions
Temperature Range
ISL6753AAxx . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to 105°C
Supply Voltage Range (Typical). . . . . . . . . . . . . . . . . . . . 9-16 VDC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. θ JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
2. All voltages are with respect to GND.
Electrical Specifications
Recommended operating conditions unless otherwise noted. Refer to Block Diagram and Typical Application
schematic. 9V < VDD < 20V, RTD = 10.0k ? , CT = 470pF, T A = -40 °C to 105 °C (Note 3), Typical values are at
T A = 25 °C
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
SUPPLY VOLTAGE
Supply Voltage
-
-
20
-
Start-Up Current, IDD
Operating Current, IDD
UVLO START Threshold
UVLO STOP Threshold
Hysteresis
VDD = 5.0V
R LOAD , C OUT = 0
-
-
8.00
6.50
-
175
11.0
8.75
7.00
1.75
400
15.5
9.00
7.50
-
μ A
mA
V
V
V
REFERENCE VOLTAGE
Overall Accuracy
Long Term Stability
Operational Current (source)
Operational Current (sink)
Current Limit
I VREF = 0 - -10mA
T A = 125°C, 1000 hours (Note 4)
VREF = 4.85V
4.850
-
-10
5
-15
5.000
3
-
-
-
5.150
-
-
-
-100
V
mV
mA
mA
mA
CURRENT SENSE
Current Limit Threshold
CS to OUT Delay
Leading Edge Blanking (LEB) Duration
CS to OUT Delay + LEB
CS Sink Current Device Impedance
Input Bias Current
VERR = VREF
Excl. LEB (Note 4)
(Note 4)
T A = 25°C
V CS = 1.1V
V CS = 0.3V
0.97
-
50
-
-
-1.0
1.00
35
70
-
-
-
1.03
50
100
130
20
1.0
V
ns
ns
ns
?
μ A
RAMP
RAMP Sink Current Device Impedance
RAMP to PWM Comparator Offset
V RAMP = 1.1V
T A = 25°C
-
65
-
80
20
95
?
mV
4
FN9182.2
April 4, 2006
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