参数资料
型号: ISL76161AVZ
厂商: Intersil
文件页数: 6/12页
文件大小: 0K
描述: IC 12-BIT HS D/A 28-TSSOP
标准包装: 50
位数: 12
转换器数目: 1
电压电源: 模拟和数字
功率耗散(最大): 120mW
工作温度: -40°C ~ 105°C
安装类型: 表面贴装
封装/外壳: 28-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 28-TSSOP
包装: 管件
输出数目和类型: 2 电流,单极
采样率(每秒): 130M
产品目录页面: 1236 (CN2011-ZH PDF)
3
FN6720.2
December 23, 2013
Pin Descriptions
PIN NO.
PIN NAME
DESCRIPTION
1 through 12
D11 (MSB) through
D0 (LSB)
Digital Data Bit 11, (Most Significant Bit) through Digital Data Bit 0, (Least Significant Bit).
15
SLEEP
Control Pin for Power-Down mode. Sleep Mode is active high; Connect to ground for Normal Mode. Sleep
pin has internal 20A active pull-down current.
16
REFLO
Connect to analog ground to enable internal 1.2V reference or connect to AVDD to disable internal
reference.
17
REFIO
Reference voltage input if internal reference is disabled. Reference voltage output if internal reference is
enabled. Use 0.
1F cap to ground when internal reference is enabled.
18
FSADJ
Full Scale Current Adjust. Use a resistor to ground to adjust full scale output current. Full Scale Output
Current = 32 x VFSADJ/RSET.
19, 25
NC
No Connect. These should be grounded, but can be left disconnected.
21
IOUTB
The complementary current output of the device. Full scale output current is achieved when all input bits
are set to binary 0.
22
IOUTA
Current output of the device. Full scale output current is achieved when all input bits are set to binary 1.
23
COMP
Connect 0.1F capacitor to ACOM.
24
AVDD
Analog Supply (+3.0V to +3.6V).
20
ACOM
Connect to Analog Ground.
13, 14, 26
DCOM
Connect to Digital Ground.
27
DVDD
Digital Supply (+3.0V to +3.6V).
28
CLK
Clock Input.
ISL76161
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