参数资料
| 型号： | ISL78228ARZ |
| 厂商： | Intersil |
| 文件页数： | 15/18页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ DL 10-DFN |
| 标准包装： | 1,000 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 2 |
| 输出电压： | 0.6 V ~ 5.5 V |
| 输入电压： | 2.75 V ~ 5.5 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 2.25MHz |
| 电流 - 输出： | 800mA |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | * |
| 封装/外壳： | * |
| 包装： | * |
| 供应商设备封装： | * |
ISL78228
P-MOSFET is turned off immediately. Then the inductor current is
fully discharged to zero and stays at zero. The output voltage
reduces gradually due to the load current discharging the output
capacitor. When the output voltage drops to the nominal voltage,
the P-MOSFET will be turned on again at the clock, repeating the
previous operations.
The regulator resumes normal PWM mode operation when the
output voltage drops 1.5% below the nominal voltage.
Synchronization Control
The frequency of operation can be synchronized up to 4MHz by
an external signal applied to the SYNC pin. The falling edge on
the SYNC triggered the rising edge of the PWM ON pulse.
Overcurrent Protection
CSA1 and CSA2 are used to monitor output 1 and output 2
channels respectively. The overcurrent protection is realized by
monitoring the CSA_ output with the OCP threshold logic, as
shown in “Block Diagram” on page 13. The current sensing
circuit has a gain of 0.285V/A, from the P-MOSFET current to the
CSA_output. When the CSA_ output reaches the threshold of
590mV, the OCP comparator is tripped to turn off the P-MOSFET
immediately. The overcurrent function protects the switching
converter from a shorted output by monitoring the current flowing
through the upper MOSFETs.
Upon detection of overcurrent condition, the upper MOSFET will
be immediately turned off and will not be turned on again until
the next switching cycle.
PG
The power-good signal, (PG) monitors both of the output
channels. When powering up, the open-collector power-on-reset
output holds low for about 1ms after V O1 and V O2 reaches the
preset voltages. The PG output also serves as a 1ms delayed
Power-Good signal. If one of the output is disabled, then PG only
monitors the active channels. There is an internal 1M ? pull-up
Soft-Start-Up
The soft-start-up eliminates the in-rush current during the
start-up. The soft-start block outputs a ramp reference to both
the voltage loop and the current loop. The two ramps limit the
inductor current rising speed as well as the output voltage speed
so that the output voltage rises in a controlled fashion. At the
very beginning of the start-up, the output voltage is less than
0.2V; hence the PWM operating frequency is 1/3 of the normal
frequency.
In force PWM mode, the IC will continue to start-up in PFM mode
to support pre-biased load applications.
Discharge Mode (Soft-Stop)
When a transition to shutdown mode occurs, or the output
undervoltage fault latch is set, the outputs discharge to GND
through an internal 100 ? switch.
Power MOSFETs
The power MOSFETs are optimize for best efficiency. The
ON-resistance for the P-MOSFET is typically 180m ? and the
ON-resistance for the N-MOSFET is typical 180m ? .
100% Duty Cycle
The ISL78228 features 100% duty cycle operation to maximize
the battery life. When the battery voltage drops to a level that the
ISL78228 can no longer maintain the regulation at the output,
the regulator completely turns on the P-MOSFET. The maximum
dropout voltage under the 100% duty-cycle operation is the
product of the load current and the ON-resistance of the
P-MOSFET.
Thermal Shut-Down
The ISL78228 has built-in thermal protection. When the internal
temperature reaches +150°C, the regulator is completely shut
down. As the temperature drops to +130°C, the ISL78228
resumes operation by stepping through a soft-start-up.
resistor.
TABLE 1. PG
Applications Information
EN1
0
0
1
1
EN2
0
1
0
1
PG1
INTERNAL
X
X
1
1
PG2
INTERNAL
X
1
X
1
PG
0
1
1
1
Output Inductor and Capacitor Selection
To consider steady state and transient operation, ISL78228
typically uses a 2.2μH output inductor. Higher or lower inductor
values can be used to optimize the total converter system
performance. For example, for higher output voltage 3.3V
applications, in order to decrease the inductor current ripple and
output voltage ripple, the output inductor value can be increased.
UVLO
The inductor ripple current can be expressed as shown in
Equation 1:
V O ? ? 1 – -------- ?
L ? f S
When the input voltage is below the undervoltage lock out (UVLO)
threshold, the regulator is disabled.
Enable
? V O ?
? V IN ?
Δ I = ------------------------------------
(EQ. 1)
The enable (EN1, EN2) input allows the user to control the turning
on or off of the regulator for purposes such as power-up
sequencing. The regulator is enabled, there is typically a 600μs
delay for waking up the bandgap reference, then the soft start-up
begins.
15
The inductor’s saturation current rating needs be at least larger
than the peak current. The ISL78228 protects the typical peak
current 1.2A. The saturation current needs be over 1.8A for
maximum output current application.
FN7849.2
December 4, 2013
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