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参数资料
| 型号： | ISL80101AIRAJZ-T |
| 厂商： | Intersil |
| 文件页数： | 8/12页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO ADJ 1A 10DFN |
| 产品培训模块： | Patient Monitoring and Diagnostic Equipment Solutions |
| 标准包装： | 6,000 |
| 稳压器拓扑结构： | 正，可调式 |
| 输出电压： | 0.8 V ~ 5 V |
| 输入电压： | 2.2 V ~ 6 V |
| 电压 - 压降（标准）： | 0.09V @ 1A |
| 稳压器数量： | 1 |
| 电流 - 输出： | 1A（最小值） |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-VFDFN 裸露焊盘 |
| 供应商设备封装： | 10-DFN（3x3） |
| 包装： | 带卷 (TR) |
ISL80101A
.
Output Voltage Selection
1.5
1.2
V IN = 4.5V
An external resistor divider is used to scale the output voltage
relative to the internal reference voltage. This voltage is then fed
back to the error amplifier. The output voltage can be
programmed to any level between 0.8V and 5V. An external
? R 3 ?
V OUT = 0.5V × ? ------- + 1 ?
0.9
0.6
0.3
V IN = 5.0V
V IN = 5.5V
resistor divider, R 2 and R 3 , is used to set the output voltage as
shown in Equations 5 and 6. Please see Table 2 on page 9 for
recommended values of R 2 and R 3 .
(EQ. 5)
? R 2 ?
R 3 = R 2 × ? ------------- – 1 ?
0.0
10
100
1000
V OUT
? 0.5V ?
(EQ. 6)
R SET (k Ω )
FIGURE 12. CURRENT LIMIT vs RSET AT DIFFERENT V IN
Enable Operation
The ENABLE turn-on threshold is typically 800mV with 80mV of
hysteresis. An internal pull-up or pull-down resistor to change
these values is available upon request. As a result, this pin must
not be left floating, and should be tied to V IN if not used. A 1k Ω to
10k Ω pull-up resistor is required for applications that use open
collector or open drain outputs to control the ENABLE pin. The
ENABLE pin may be connected directly to V IN for applications
with outputs that are always on.
Power-Good Operation
PG is a logic output that indicates the status of V OUT , current limit
tripping, and V IN . The PG flag is an open-drain NMOS that can
sink up to 10mA during a fault condition. The PG pin requires an
external pull-up resistor typically connected to the V OUT pin. The
PG pin should not be pulled up to a voltage source greater than
V IN . PG goes low when the output voltage drops below 84% of the
nominal output voltage, the current limit faults, or the input voltage is
too low. PG functions during shutdown, but not during thermal
shutdown. For applications not using this feature, connect this pin to
ground.
Soft-Start Operation
The soft-start circuit controls the rate at which the output voltage
rises up to regulation at power-up or LDO enable. This start-up
ramp time can be set by adding an external capacitor from the
SS pin to ground. An internal 2μA current source charges up this
External Capacitor Requirements
External capacitors are required for proper operation. Careful
attention must be paid to the layout guidelines and selection of
capacitor type and value to ensure optimal performance.
OUTPUT CAPACITOR
The ISL80101A applies state-of-the-art internal compensation to
keep the selection of the output capacitor simple for the
customer. Stable operation over full temperature, V IN range,
V OUT range and load extremes are guaranteed for all capacitor
types and values assuming a minimum of 10μF X5R/X7R is used
for local bypass on V OUT . This output capacitor must be
connected to the V OUT and GND pins of the LDO with PCB traces
no longer than 0.5cm.
There is a growing trend to use very-low ESR multilayer ceramic
capacitors (MLCC) because they can support fast load transients and
also bypass very high frequency noise from other sources. However,
the effective capacitance of MLCCs drops with applied voltage, age,
and temperature. X7R and X5R dielectric ceramic capacitors are
strongly recommended as they typically maintain a capacitance
range within ±20% of nominal voltage over full operating ratings of
temperature and voltage.
Additional capacitors of any value in ceramic, POSCAP,
alum/tantalum electrolytic types may be placed in parallel to
improve PSRR at higher frequencies and/or load transient AC
output voltage tolerances.
Phase Boost Capacitor
(EQ. 7)
F z = --------------------------------
C SS and the feedback reference voltage is clamped to the
voltage across it. The start-up time is set by Equation 3.
2 μ A
( C SS x0.5 )
T start = ---------------------------
(EQ. 3)
A small phase boost capacitor, C PB , can be placed across the top
resistor, R 3 , in the feedback resistor divider network in order to
place a zero at:
1
2 π xR 3 xC PB
( V OUT xC OUT x2 μ A ) )
C SS = -----------------------------------------------------
Equation 4 determines the C SS required for a specific start-up
in-rush current, where V OUT is the output voltage, C OUT is the
total capacitance on the output and I INRUSH is the desired in-rush
current.
(EQ. 4)
I INRUSH x0.5V
The external capacitor is always discharged to ground at the
beginning of start-up or enabling.
Table 2 shows the recommended C PB , R 3 and R 2 for different
8
This zero increases the crossover frequency of the LDO and
provides additional phase resulting in faster load transient
response.
It is also important to note that the LDO stability and load
transient are affected by the type of output capacitor used. For
optimal result, empirical tuning is suggested for each specific
application.
output voltage and ceramic C OUT .
FN7712.3
September 29, 2011
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL80101EVAL2Z | 功能描述:EVAL BOARD FOR ISL80101 RoHS:是 类别:编程器，开发系统 >> 评估板 - 线性稳压器 (LDO) 系列:* 产品变化通告:1Q2012 Discontinuation 30/Mar/2012 设计资源:NCP590MNDPTAGEVB Gerber Files 标准包装:1 系列:- 每 IC 通道数:2 - 双 输出电压:1.8V，2.8V 电流 - 输出:300mA 输入电压:2.1 ~ 5.5 V 稳压器类型:正，固定式 工作温度:-40°C ~ 85°C 板类型:完全填充 已供物品:板 已用 IC / 零件:NCP590MNDP 其它名称:NCP590MNDPTAGEVB-NDNCP590MNDPTAGEVBOS |
| ISL80101IR08Z | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:High Performance 1A LDO |
| ISL80101IR08Z-T | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:High Performance 1A LDO |
| ISL80101IR12Z | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:High Performance 1A LDO |
| ISL80101IR12Z-T | 制造商:Intersil Corporation 功能描述:- Tape and Reel |
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