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参数资料
| 型号： | ISL80101EVAL2Z |
| 厂商： | Intersil |
| 文件页数： | 3/11页 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD FOR ISL80101 |
| 产品培训模块： | Patient Monitoring and Diagnostic Equipment Solutions |
| 标准包装： | 1 |
| 系列： | * |
ISL80101
Pin Configurations
ISL80101
(10 LD 3X3 DFN)
TOP VIEW
V OUT 1
V OUT 2
10 V IN
9 V IN
Pin Descriptions
SENSE 3
PG 4
GND 5
EPAD
8 NC
7 ENABLE
6 SS
PIN NUMBER
1, 2
3
4
5
6
7
8
9, 10
-
PIN NAME
V OUT
SENSE
PG
GND
SS
ENABLE
NC
V IN
EPAD
3
DESCRIPTION
Regulated output voltage. A minimum 10μF X5R/X7R output capacitor is required for stability. See “External
The PGOOD circuit uses this input to monitor the output voltage status, providing a remote voltage sense.
This is an open drain logic output used to indicate the status of the output voltage. Logic low indicates V OUT is not
in regulation. This pin must be grounded if not used.
Ground.
External capacitor on this pin adjusts startup ramp and controls inrush current.
V IN independent chip enable. TTL and CMOS compatible.
No connection. Leave floating.
Input supply. A minimum of 10μF X5R/X7R input capacitor is required for proper operation. See “External
EPAD at ground potential. It is recommended to solder the EPAD to the ground plane.
FN6931.1
August 31, 2011
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL80101IR08Z | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:High Performance 1A LDO |
| ISL80101IR08Z-T | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:High Performance 1A LDO |
| ISL80101IR12Z | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:High Performance 1A LDO |
| ISL80101IR12Z-T | 制造商:Intersil Corporation 功能描述:- Tape and Reel |
| ISL80101IR15Z | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:High Performance 1A LDO |
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