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| 型号： | ISL80101IRAJZ-T |
| 厂商： | Intersil |
| 文件页数： | 9/11页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO ADJ 1A 10DFN |
| 产品培训模块： | Patient Monitoring and Diagnostic Equipment Solutions |
| 标准包装： | 6,000 |
| 稳压器拓扑结构： | 正，可调式 |
| 输出电压： | 0.8 V ~ 5 V |
| 输入电压： | 2.2 V ~ 6 V |
| 电压 - 压降（标准）： | 0.13V @ 1A |
| 稳压器数量： | 1 |
| 电流 - 输出： | 1A（最小值） |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-VFDFN 裸露焊盘 |
| 供应商设备封装： | 10-DFN（3x3） |
| 包装： | 带卷 (TR) |
ISL80101
Additional capacitors of any value in ceramic, POSCAP,
alum/tantalum electrolytic types may be placed in parallel to
improve PSRR at higher frequencies and/or load transient AC
output voltage tolerances.
INPUT CAPACITOR
For proper operation, a minimum capacitance of 10μF X5R/X7R
is required at the input. This ceramic input capacitor must be
49
47
45
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connected to the V IN and GND pins of the LDO with PCB traces no
longer than 0.5cm.
Power Dissipation and Thermals
The junction temperature must not exceed the range specified in
41
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37
2
4 6 8 10 12 14 16 18 20 22
EPAD-MOUNT COPPER LAND AREA ON PCB, mm 2
24
P D = ( V IN – V OUT ) × I OUT + V IN × I GND
P D ( MAX ) = ( T J ( MAX ) – T A ) ? θ JA
Equation 3:
(EQ. 3)
The maximum allowable junction temperature, T J(MAX) and the
maximum expected ambient temperature, T A(MAX) determine the
maximum allowable power dissipation, as shown in Equation 4:
(EQ. 4)
θ JA is the junction-to-ambient thermal resistance.
For safe operation, enure that the power dissipation P D ,
calculated from Equation 3, is less than the maximum allowable
power dissipation P D(MAX) .
The DFN package uses the copper area on the PCB as a heat-sink.
The EPAD of this package must be soldered to the copper plane
(GND plane) for effective heat dissipation. Figure 16 shows a curve
for the θ JA of the DFN package for different copper area sizes.
9
FIGURE 16. 3mmx3mm-10 PIN DFN ON 4-LAYER PCB WITH
THERMAL VIAS θ JA vs EPAD-MOUNT COPPER LAND
AREA ON PCB
Thermal Fault Protection
The power level and the thermal impedance of the package
(+45°C/W for DFN) determine when the junction temperature
exceeds the thermal shutdown temperature. In the event that the
die temperature exceeds around +160°C, the output of the LDO will
shut down until the die temperature cools down to about +130°C.
Current Limit Protection
The ISL80101 LDO incorporates protection against overcurrent due
to any short or overload condition applied to the output pin. The LDO
performs as a constant current source when the output current
exceeds the current limit threshold noted in the “Electrical
Specifications” table on page 4. If the short or overload condition is
removed from V OUT , then the output returns to normal voltage
regulation mode. In the event of an overload condition, the LDO may
begin to cycle on and off due to the die temperature exceeding
thermal fault condition and subsequently cooling down after the
power device is turned off.
FN6931.1
August 31, 2011
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL80101IRAJZ-T7A | 功能描述:线性稳压器 - 标准 1A SNG LDO HI CURR LW VOLT RoHS:否 制造商:STMicroelectronics 输出类型: 极性: 输出电压:1.8 V 输出电流:150 mA 负载调节: 最大输入电压:5.5 V 线路调整率: 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:SOT-323-5L |
| ISL80101IRAJZ-TK | 功能描述:IC REG LDO ADJ 1A 10DFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 系列:- 其它有关文件:LD39015JXX12 View All Specifications 标准包装:1 系列:- 稳压器拓扑结构:正，固定式 输出电压:1.2V 输入电压:1.5 V ~ 5.5 V 电压 - 压降（标准）:- 稳压器数量:1 电流 - 输出:150mA 电流 - 限制（最小）:- 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:4-WFBGA，FCBGA 供应商设备封装:4-覆晶（1.07x1.07） 包装:Digi-Reel® 其它名称:497-11958-6 |
| ISL80102 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:High Performance 2A and 3A LDOs |
| ISL80102_10 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:High Performance 2A and 3A Linear Regulators |
| ISL80102_11 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:High Performance 2A and 3A Linear Regulators |
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