参数资料
型号: ISL8013IRZ-T
厂商: Intersil
文件页数: 2/17页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 3A 16QFN
产品培训模块: ISL8013/4 Synchronous Buck Regulators
标准包装: 1
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.8 V ~ 5.5 V
输入电压: 2.7 V ~ 5.5 V
PWM 型: 电流模式
频率 - 开关: 1MHz
电流 - 输出: 3A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-VQFN 裸露焊盘
包装: 标准包装
供应商设备封装: 16-QFN(4x4)
产品目录页面: 1248 (CN2011-ZH PDF)
其它名称: ISL8013IRZ-TDKR
ISL8013
Ordering Information
TEMP.
PART NUMBER
(Notes 1, 2, 3)
ISL8013IRZ
PART
MARKING
80 13IRZ
RANGE
(°C)
-40 to +85
PACKAGE
(Pb-Free)
16 Ld 4x4 QFN
PKG.
DWG. #
L16.4x4
NOTES:
1. Add “-T” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both
SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL8013 . For more information on MSL please see
techbrief TB363 .
Pin Configuration
ISL8013
(16 LD QFN)
TOP VIEW
VIN
VIN
VDD
1
2
3
16
15
14
13
12 PGND
11 PGND
10 SGND
SYNCH
4
9
SGND
5
6
7
8
Pin Descriptions
PIN NUMBER
1, 2
3
5
7
4
13, 14, 15
11, 12
9, 10
8
6, 16
-
PIN NAME
VIN
VDD
EN
PG
SYNCH
LX
PGND
SGND
VFB
NC
Exposed Pad
2
DESCRIPTION
Input supply voltage. Connect a 10μF ceramic capacitor to power ground.
Input supply voltage for the analog circuitry. Connect to VIN pin.
Regulator enable pin. Keep the EN voltage low in disabled state until VIN settles or is
above 2.5V. Enable the output when driven to high. Shut down the chip and discharge
output capacitor when driven to low. Do not connect directly to VIN or leave this pin
floating.
1ms timer output. At power-up or EN HI, this output is a 1ms delayed Power-Good signal
for the output voltage.
Mode Selection pin. Connect to logic high or input voltage VDD for PWM mode. Connect
to logic low or ground for PFM mode. Connect to an external function generator for
synchronization with the negative edge trigger. Do not leave this pin floating.
Switching node connection. Connect to one terminal of the inductor.
Power ground
Signal ground.
Buck regulator output feedback. Connect to the output through a resistor divider for
adjustable output voltage. For 0.8V output voltage, connect this pin to the output.
No connect.
The exposed pad must be connected to the SGND pin for proper electrical performance.
Place as much vias as possible under the pad connecting to SGND plane for optimal
thermal performance.
FN6309.3
November 23, 2009
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