参数资料
| 型号： | ISL8033IRZ |
| 厂商： | Intersil |
| 文件页数： | 15/18页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 3A DL 24QFN |
| 标准包装： | 75 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 2 |
| 输出电压： | 0.8 V ~ 6 V |
| 输入电压： | 2.85 V ~ 6 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 1.1MHz |
| 电流 - 输出： | 3A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-VFQFN 裸露焊盘 |
| 包装： | 管件 |
| 供应商设备封装： | 24-QFN（4x4） |
ISL8033, ISL8033A
Overcurrent Protection
CAS1 and CSA2 are used to monitor Output 1 and Output 2
channels respectively. The overcurrent protection is realized by
monitoring the CSA output with the OCP threshold logic, as
shown in Figure 40. The current sensing circuit has a gain of
0.20V/A, from the P-MOSFET current to the CSA output. When
the CSA1 output reaches the threshold set by ISET, the OCP
comparator is tripped to turn off the P-MOSFET immediately. The
overcurrent function protects the switching converter from a
shorted output by monitoring the current flowing through the
upper MOSFETs.
Upon detection of overcurrent condition, the upper MOSFET will be
immediately turned off and will not be turned on again until the next
switching cycle. Upon detection of the initial overcurrent condition,
the Overcurrent Fault Counter is set to 1 and the Overcurrent
Condition Flag is set from LOW to HIGH. If, on the subsequent cycle,
another overcurrent condition is detected, the OC Fault Counter will
be incremented. If there are 17 sequential OC fault detections, the
regulator will be shutdown under an Overcurrent Fault Condition. An
Overcurrent Fault Condition will result in the regulator attempting to
restart in a hiccup mode with the delay between restarts being 4
soft-start periods. At the end of the fourth soft-start wait period, the
fault counters are reset and soft-start is attempted again. If the
overcurrent condition goes away prior to the OC Fault Counter
reaching a count of four, the Overcurrent Condition Flag will set back
to LOW.
If the negative output current reaches -2.5A, the part enters
Negative Overcurrent Protection. At this point, all switching stops
and the part enters tri-state mode while the pull-down FET is
discharging the output until it reaches normal regulation voltage,
then the IC restarts.
PG
There are two independent power-good signals. PG1 monitors
the Output Channel 1 and PG2 monitors the Output Channel 2.
When powering up, the open-collector Power-On Reset output
holds low for about 1ms after V O reaches the preset voltage. The
PG_ output also serves as a 1ms delayed Power-Good signal.
UVLO
0.5V; hence the PWM operating frequency is 1/2 of the normal
frequency.
When the IC ramps up at start-up, it can’t sink current even at
PWM mode.
Discharge Mode (Soft-Stop)
When a transition to shutdown mode occurs, or the output
undervoltage fault latch is set, its output discharges to PGND
through an internal 100 Ω switch.
Power MOSFETs
The power MOSFETs are optimize for best efficiency. The ON-
resistance for the P-MOSFET is typically 50m Ω and the ON-
resistance for the N-MOSFET is typical 50m Ω .
100% Duty Cycle
The ISL8033 features 100% duty cycle operation to maximize
the battery life. When the battery voltage drops to a level that the
ISL8033, ISL8033A can no longer maintain the regulation at the
output, the regulator completely turns on the P-MOSFET. The
maximum drop-out voltage under the 100% duty-cycle operation
is the product of the load current and the ON-resistance of the P-
MOSFET.
Thermal Shutdown
The ISL8033, ISL8033A has built-in thermal protection. When the
internal temperature reaches +150°C, the regulator is completely
shutdown. As the temperature drops to +125°C, the ISL8033,
ISL8033A resumes operation by stepping through a soft start-up.
Applications Information
Output Inductor and Capacitor Selection
To consider steady state and transient operation, ISL8033
typically uses a 1.5μH output inductor. Higher or lower inductor
value can be used to optimize the total converter system
performance. For example, for a higher output voltage 3.3V
application, in order to decrease the inductor current ripple and
output voltage ripple, the output inductor value can be increased.
The inductor ripple current can be expressed in Equation 1:
V O ? ? 1 – -------- ?
? V IN ?
L ? f S
When the input voltage is below the undervoltage lock out (UVLO)
threshold, the regulator is disabled.
Enable
? V O ?
Δ I = ------------------------------------
(EQ. 1)
The enable (EN) input allows the user to control the turning on or
off the regulator for purposes such as power-up sequencing.
When the regulator is enabled, there is typically a 600μs delay
for waking up the bandgap reference and then the soft-start-up
will begin.
Soft Start-Up
The soft start-up eliminates the inrush current during the start-
up. The soft-start block outputs a ramp reference to both the
voltage loop and the current loop. The two ramps limit the
inductor current rising 1/2 speed as well as the output voltage
speed so that the output voltage rises in a controlled fashion. At
the very beginning of the start-up, the output voltage is less than
15
The inductor’s saturation current rating needs be at least larger
than the peak current. The ISL8033, ISL8033A protects the
typical peak current 4.8A. The saturation current needs be over
4.8A for maximum output current application.
ISL8033, ISL8033A uses an internal compensation network and
the output capacitor value is dependent on the output voltage.
The ceramic capacitor is recommended to be X5R or X7R. The
recommended minimum output capacitor values for the
Output Voltage Selection
The output voltage of the regulator can be programmed via an
external resistor divider, which is used to scale the output voltage
FN6854.2
March 24, 2011
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