参数资料
型号: ISL8101CRZ
厂商: Intersil
文件页数: 5/20页
文件大小: 0K
描述: IC PWM CTRLR BUCK 2PHASE 24-QFN
标准包装: 75
应用: 控制器,Intel VRM9,VRM10,AMD Hammer 应用
输入电压: 4.6 V ~ 12 V
输出数: 1
输出电压: 0.6 V ~ 2.3 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 24-VFQFN 裸露焊盘
供应商设备封装: 24-QFN(4x4)
包装: 管件
ISL8101
Electrical Specifications
Test Conditions: V CC = 5V, T J = 0°C to +85°C, Unless Otherwise Specified. Parameters with MIN and/or MAX
limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested. (Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
OVERCURRENT PROTECTION
Overcurrent Trip Level
72
95
115
μA
PROTECTION
Overvoltage Threshold while IC Disabled
Overvoltage Threshold
VRM9.0 configuration
Hammer and VRM10.0 configurations
FB Rising
1.90
1.60
-
1.95
1.65
VID
2.00
1.70
-
V
V
V
+200mV
Overvoltage Hysteresis
-
100
-
mV
SWITCHING TIME
UGATE Rise Time (Note3)
LGATE Rise Time (Note3)
UGATE Fall Time (Note 3)
LGATE Fall Time (Note 3)
UGATE Turn-On Non-overlap (Note 3)
LGATE Turn-On Non-overlap (Note 3)
t RUGATE; V VCC = 5V, 3nF Load
t RLGATE; V VCC = 5V, 3nF Load
t FUGATE; V VCC = 5V, 3nF Load
t FLGATE; V VCC = 5V, 3nF Load
t PDHUGATE ; V VCC = 5V, 3nF Load
t PDHLGATE ; V VCC = 5V, 3nF Load
-
-
-
-
-
-
8
8
8
4
8
8
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
OUTPUT
Upper Drive Source Resistance
Upper Drive Sink Resistance
Lower Drive Source Resistance
Lower Drive Sink Resistance
100mA Source Current
100mA Sink Current
100mA Source Current
100mA Sink Current
-
-
-
-
1.0
1.0
1.0
0.4
2.5
2.5
2.5
1.0
Ω
Ω
Ω
Ω
NOTE:
3. Limits should be considered typical and are not production tested.
Timing Diagram
t PDHUGATE
t RUGATE
UGATE
LGATE
t FLGATE
Functional Pin Description
VCC (Pin 8)
Bias supply for the IC’s small-signal circuitry. Connect this
pin to a 5V supply and locally decouple using a quality 0.1μF
ceramic capacitor. This pin is monitored for Power-On Reset
(POR) purpose.
5
t FUGATE
t RLGATE
t PDHLGATE
PVCC (Pin 16)
Power supply pin for the MOSFET drives. Connect this pin to
a 5V supply and locally decouple using a quality 1μF
ceramic capacitor. This pin is monitored for POR purpose.
GND and PGND (Pins 25 and 14)
Connect these pins to the circuit ground using the shortest
possible paths. All internal small-signal circuitry is
FN9223.1
July 28, 2008
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