参数资料
型号: ISL8104IRZ-T
厂商: Intersil
文件页数: 5/14页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 16-QFN
标准包装: 6,000
PWM 型: 电压模式
输出数: 1
频率 - 最大: 1.5MHz
占空比: 100%
电源电压: 7.6 V ~ 15.4 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 16-VQFN 裸露焊盘
包装: 带卷 (TR)
ISL8104
Electrical Specifications
Recommended Operating Conditions, unless otherwise noted, specifications in bold are valid for process,
temperature, and line operating conditions. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
OSCILLATOR
Trim Test Frequency
Total Variation (Note 4)
R FSET = OPEN V VCC = 12
8k Ω < R FSET to GND < 200k Ω
175
-
200
± 15
220
-
kHz
%
Ramp Amplitude
Ramp Bottom (Note 4)
Δ V OSC
R FSET = OPEN
1.7
-
1.9
1
2.15
-
V P-P
V
ERROR AMPLIFIER
DC Gain (Note 4)
R L = 10k Ω , C L = 100pF
-
88
-
dB
Gain-Bandwidth Product (Note 4)
Slew Rate (Note 4)
COMP Source Current (Note 4)
COMP Sink Current (Note 4)
GBWP
SR
ICOMPSRC
ICOMPSNK
R L = 10k Ω , C L = 100pF
R L = 10k Ω , C L = 100pF
-
-
-
-
15
6
2
2
-
-
-
-
MHz
V/ μ s
mA
mA
GATE DRIVERS
Top-side Drive Source Current (Note 4)
I T_SOURCE
V BOOT - V LX = 14V, 3nF Load
-
1.25
-
A
Top-side Drive Source Impedance
R T_SOURCE 90mA Source Current
-
2.0
-
Ω
Top-side Drive Sink Current (Note 4)
Top-side Drive Sink Impedance
Bottom-side Drive Source Current (Note 4)
I T_SINK
R T_SINK
I B_SOURCE
V BOOT - V LX = 14V, 3nF Load
90mA Source Current
V PVCC = 14V, 3nF Load
-
-
-
2
1.3
2
-
-
-
A
Ω
A
Bottom-side Drive Source Impedance
R B_SOURCE 90mA Source Current
-
1.3
-
Ω
Bottom-side Drive Sink Current (Note 4)
Bottom-side Drive Sink Impedance
I B_SINK
R B_SINK
V PVCC = 14V, 3nF Load
90mA Source Current
-
-
3
0.94
-
-
A
Ω
PROTECTION
TSOC Current
I TSOC
T J = 0 ° C to +70 ° C
T J = -40 ° C to +85 ° C
180
176
200
200
220
224
μ A
μ A
TSOC Measurement Offset (Note 4)
OCP OFFSET TSOC = 1.5V to 15.4V
-
± 10
-
mV
SOFT-START
Soft-start Current
SSDONE Low Output Voltage (QFN ONLY)
I SS
I SSDONE = 2mA
22
-
30
-
38
0.30
μ A
V
Functional Pin Description (QFN/SOIC)
SS (Pin 1/3)
Connect a capacitor from this pin to ground. This capacitor,
along with an internal 30μA current source, sets the soft-start
interval of the converter.
COMP (Pin 2/4) and FB (Pin 3/5)
COMP and FB are the available external pins of the error
amplifier. The FB pin is the inverting input of the error
amplifier and the COMP pin is the error amplifier output.
These pins are used to compensate the voltage-control
feedback loop of the converter.
5
EN (Pin 4/6)
This pin is a TTL compatible input. Pull this pin below 0.8V to
disable the converter. In shutdown the soft-start pin is
discharged and the TGATE and BGATE pins are held low.
REFIN (QFN ONLY Pin 5)
Upon enable if REFIN is less than 2.2V, the external
reference pin is used as the control reference instead of the
internal 0.597V reference. An internal 6μA pull-up to 5V is
provided for disabling this functionality.
GND (Pin 6/7)
Signal ground for the IC. All voltage levels are measured
with respect to this pin.
FN9257.2
March 7, 2008
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