参数资料
型号: ISL8105ACRZ-T
厂商: Intersil
文件页数: 10/16页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 10-DFN
标准包装: 6,000
PWM 型: 电压模式
输出数: 1
频率 - 最大: 660kHz
占空比: 100%
电源电压: 6.5 V ~ 14.4 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: 0°C ~ 70°C
封装/外壳: 10-VFDFN 裸露焊盘
包装: 带卷 (TR)
ISL8105, ISL8105A
must be <24V. So based on typical circuits, a 20V maximum
V IN is a good starting assumption; the user should verify the
ringing in their particular application.
Another consideration for high V IN is duty cycle. Very low
duty cycles (such as 20V in to 1.0V out, for 5% duty cycle)
require component selection compatible with that choice
(such as low r DS(ON) bottom-side MOSFET, and a good LC
output filter). At the other extreme (for example, 20V in to
12V out), the top-side MOSFET needs to be low r DS(ON) . In
addition, if the duty cycle gets too high, it can affect the
overcurrent sample time. In all cases, the input and output
capacitors and both MOSFETs must be rated for the
voltages present.
Switching Frequency
The switching frequency is either a fixed 300kHz or 600kHz,
depending on the part number chosen (ISL8105 is 300kHz;
Application Guidelines
Layout Considerations
As in any high-frequency switching converter, layout is very
important. Switching current from one power device to
another can generate voltage transients across the
impedances of the interconnecting bond wires and circuit
traces. These interconnecting impedances should be
minimized by using wide, short printed circuit traces. The
critical components should be located as close together as
possible using ground plane construction or single point
grounding.
V IN
ISL8105
ISL8105A is 600kHz; the generic name “ISL8105” may apply
to either in the rest of this document, except when choosing
TGATE
LX
Q1
L O
V OUT
the frequency). However, all of the other timing mentioned
(POR delay, OCP sample, soft-start, etc.) is independent of
the clock frequency (unless otherwise noted).
BGATE
Q2
C IN
C O
BOOT Refresh
In the event that the TGATE is on for an extended period of
time, the charge on the boot capacitor can start to sag,
raising the r DS(ON) of the top-side MOSFET. The ISL8105
has a circuit that detects a long TGATE on-time (nominal
100μs), and forces the BGATE to go higher for one clock
cycle, which will allow the boot capacitor some time to
recharge. Separately, the OCP circuit has a BGATE pulse
stretcher (to be sure the sample time is long enough), which
can also help refresh the boot. But if OCP is disabled (no
current sense resistor), the regular boot refresh circuit will
still be active.
Current Sinking
The ISL8105 incorporates a MOSFET shoot-through
protection method which allows a converter to sink current
as well as source current. Care should be exercised when
designing a converter with the ISL8105 when it is known that
the converter may sink current.
When the converter is sinking current, it is behaving as a
boost converter that is regulating its input voltage. This
means that the converter is boosting current into the V IN rail.
If there is nowhere for this current to go, such as to other
distributed loads on the V IN rail, through a voltage limiting
protection device, or other methods, the capacitance on the
V IN bus will absorb the current. This situation will allow
voltage level of the V IN rail (also LX) to increase. If the
voltage level of the LX is increased to a level that exceeds
the maximum voltage rating of the ISL8105, then the IC will
experience an irreversible failure and the converter will no
longer be operational. Ensuring that there is a path for the
current to follow other than the capacitance on the rail will
prevent this failure mode.
10
PGND
RETURN
FIGURE 7. PRINTED CIRCUIT BOARD POWER AND
GROUND PLANES OR ISLANDS
Figure 7 shows the critical power components of the
converter. To minimize the voltage overshoot/undershoot,
the interconnecting wires indicated by heavy lines should be
part of ground or power plane in a printed circuit board. The
components shown in Figure 8 should be located as close
together as possible. Please note that the capacitors C IN
and C O each represent numerous physical capacitors.
Locate the ISL8105 within three inches of the MOSFETs, Q 1
and Q 2 . The circuit traces for the MOSFETs’ gate and
source connections from the ISL8105 must be sized to
handle up to 1A peak current.
Proper grounding of the IC is important for correct operation
in noisy environments. The GND pin should be connected to
a large copper fill under the IC which is subsequently
connected to board ground at a quiet location on the board,
typically found at an input or output bulk (electrolytic)
capacitor.
Figure 8 shows the circuit traces that require additional
layout consideration. Use single point and ground plane
construction for the circuits shown. Locate the resistor,
R BSOC , close to the BGATE/BSOC pin as the internal BSOC
current source is only 21.5μA.
FN6306.5
April 15, 2010
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