参数资料
型号: ISL83078EIUZA
厂商: Intersil
文件页数: 17/18页
文件大小: 0K
描述: IC TXRX RS485/422 3.3V HS 8-MSOP
标准包装: 980
类型: 收发器
驱动器/接收器数: 1/1
规程: RS422,RS485
电源电压: 3 V ~ 3.6 V
安装类型: 表面贴装
封装/外壳: 8-TSSOP,8-MSOP(0.118",3.00mm 宽)
供应商设备封装: 8-MSOP
包装: 管件
8
FN6115.5
October 5, 2012
Receiver Disable from Output Low
tLZ
RL = 1kΩ, CL = 15pF,
SW = VCC (Figure 6),
(Note 13)
ISL83070E-75E
Full
5
13
20
ns
ISL83076E-78E
Full
4
7
15
ns
Time to Shutdown
tSHDN
(Notes 10, 13)
Full
50
180
600
ns
Receiver Enable from Shutdown to
Output High
tZH(SHDN) RL = 1kΩ, CL = 15pF, SW = GND (Figure 6),
Full
-
240
500
ns
Receiver Enable from Shutdown to
Output Low
tZL(SHDN) RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6),
Full
-
240
500
ns
NOTES:
5. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise
specified.
6. Supply current specification is valid for loaded drivers when DE = 0V.
7. Applies to peak current. See “Typical Performance Curves” for more information.
8. When testing devices with the shutdown feature, keep RE = 0 to prevent the device from entering SHDN.
9. When testing devices with the shutdown feature, the RE signal high time must be short enough (typically <100ns) to prevent the device from
entering SHDN.
10. Versions with a shutdown feature are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 50ns, the parts
are guaranteed not to enter shutdown. If the inputs are in this state for at least 600ns, the parts are guaranteed to have entered shutdown. See
11. Keep RE = VCC, and set the DE signal low time >600ns to ensure that the device enters SHDN.
12. Set the RE signal high time >600ns to ensure that the device enters SHDN.
13. Does not apply to the ISL83071E and ISL83077E.
14.
ΔtSKEW is the magnitude of the difference in propagation delays of the specified terminals of two units tested with identical test conditions (VCC,
temperature, etc.). Only applies to the ISL83076E - 78E.
15. ISL83070E - ISL83075E only.
16. VCC ≥ 3.15V
17. Limits established by characterization and are not production tested.
18. If the Tx or Rx enable function isn’t needed, connect the enable pin to the appropriate supply (see “Pin Descriptions” table) through a 1k
Ω to 3kΩ
resistor.
19. Parts are 100% tested at +25°C. Full temperature limits are guaranteed by bench and tester characterization.
20. If the DE or RE input voltage exceeds the VCC voltage by more than 500mV, then current will flow into the logic pin. The current is limited by a
340 resistor (so ≈13mA with VIN = 5V and VCC = 0V) so no damage will occur if VCC ≤ VIN ≤ 7V for short periods of time.
Test Circuits and Waveforms
FIGURE 1A. VOD AND VOC
FIGURE 1B. VOD WITH COMMON MODE LOAD
FIGURE 1. DC DRIVER TEST CIRCUITS
Electrical Specifications
Test Conditions: VCC = 3.0V to 3.6V; Unless Otherwise Specified. Typicals are at VCC = 3.3V, TA = +25°C
(Note 5). (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
TEMP
(°C)
MIN
(Note 19) TYP
MAX
(Note 19) UNITS
D
DE
DI
VCC
VOD
VOC
RL/2
Z
Y
D
DE
DI
VCC
VOD
375
Z
Y
RL = 60
VCM
-7V TO +12V
ISL83070E, ISL83071E, ISL83072E, ISL83073E, ISL83075E, ISL83076E, ISL83077E, ISL83078E
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