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参数资料
| 型号： | ISL83202IPZ |
| 厂商： | Intersil |
| 文件页数： | 6/12页 |
| 文件大小： | 0K |
| 描述： | IC FET DRIVER H-BRIDGE 1A 16-DIP |
| 标准包装： | 500 |
| 配置： | 半桥 |
| 输入类型： | 反相和非反相 |
| 延迟时间： | 75ns |
| 电流 - 峰： | 1A |
| 配置数： | 1 |
| 输出数： | 4 |
| 高端电压 - 最大（自引导启动）： | 70V |
| 电源电压： | 8.5 V ~ 15 V |
| 工作温度： | -55°C ~ 125°C |
| 安装类型： | 通孔 |
| 封装/外壳： | 16-DIP（0.300"，7.62mm） |
| 供应商设备封装： | 16-PDIP |
| 包装： | 管件 |
ISL83202
Pin Descriptions
PIN
NUMBE
R
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
SYMBOL
BHB
BHI
BLI
ALI
DEL
V SS
AHI
DIS
AHB
AHO
AHS
V DD
ALO
BLO
BHS
BHO
DESCRIPTION
B High-side Bootstrap supply. External bootstrap diode and capacitor are required. Connect cathode of bootstrap diode
and positive side of bootstrap capacitor to this pin.
B High-side Input. Logic level input that controls BHO driver (Pin 16). BLI (Pin 3) high level input overrides BHI high level
input to prevent half-bridge shoot-through, see Truth Table. DIS (Pin 8) high level input overrides BHI high level input. The
pin can be driven by signal levels of 0V to 15V (no greater than V DD ).
B Low-side Input. Logic level input that controls BLO driver (Pin 14). If BHI (Pin 2) is driven high or not connected externally
then BLI controls both BLO and BHO drivers, with dead time set by delay currents at DEL (Pin 5). DIS (Pin 8) high level
input overrides BLI high level input. The pin can be driven by signal levels of 0V to 15V (no greater than V DD ).
A Low-side Input. Logic level input that controls ALO driver (Pin 13). If AHI (Pin 7) is driven high or not connected externally
then ALI controls both ALO and AHO drivers, with dead time set by delay currents at DEL (Pin 5). DIS (Pin 8) high level
input overrides ALI high level input. The pin can be driven by signal levels of 0V to 15V (no greater than V DD ).
Turn-on DELay. Connect resistor from this pin to V SS to set timing current that defines the dead time between drivers. All
drivers turn-off with no adjustable delay, so the DEL resistor guarantees no shoot-through by delaying the turn-on of all
drivers. The voltage across the DEL resistor is approximately V DD -2V.
Chip negative supply, generally will be ground.
A High-side Input. Logic level input that controls AHO driver (Pin 10). ALI (Pin 4) high level input overrides AHI high level
input to prevent half-bridge shoot-through, see Truth Table. DIS (Pin 8) high level input overrides AHI high level input. The
pin can be driven by signal levels of 0V to 15V (no greater than V DD ).
DISable input. Logic level input that when taken high sets all four outputs low. DIS high overrides all other inputs. When
DIS is taken low the outputs are controlled by the other inputs. The pin can be driven by signal levels of 0V to 15V (no
greater than V DD ).
A High-side Bootstrap supply. External bootstrap diode and capacitor are required. Connect cathode of bootstrap diode
and positive side of bootstrap capacitor to this pin.
A High-side Output. Connect to gate of A High-side power MOSFET.
A High-side Source connection. Connect to source of A High-side power MOSFET. Connect negative side of bootstrap
capacitor to this pin.
Positive supply to control logic and lower gate drivers. De-couple this pin to V SS (Pin 6).
A Low-side Output. Connect to gate of A Low-side power MOSFET.
B Low-side Output. Connect to gate of B Low-side power MOSFET.
B High-side Source connection. Connect to source of B High-side power MOSFET. Connect negative side of bootstrap
capacitor to this pin.
B High-side Output. Connect to gate of B High-side power MOSFET.
6
FN6382.0
December 20, 2006
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