参数资料
型号: ISL83204AIPZ
厂商: Intersil
文件页数: 7/15页
文件大小: 0K
描述: IC FET DVR 60V/2.5A HF 20-PDIP
标准包装: 18
配置: 半桥
输入类型: PWM
延迟时间: 70ns
电流 - 峰: 2.6A
配置数: 1
输出数: 4
高端电压 - 最大(自引导启动): 75V
电源电压: 9.5 V ~ 15 V
工作温度: -40°C ~ 85°C
安装类型: 通孔
封装/外壳: 20-DIP(0.300",7.62mm)
供应商设备封装: 20-PDIP
包装: 管件
产品目录页面: 1242 (CN2011-ZH PDF)
ISL83204A
Pin Descriptions
PIN
NUMBER
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
SYMBOL
BHB
HEN
DIS
V SS
OUT
IN+
IN-
HDEL
LDEL
AHB
AHO
AHS
ALO
ALS
V CC
V DD
BLS
BLO
BHS
BHO
DESCRIPTION
B High-side Bootstrap supply. External bootstrap diode and capacitor are required. Connect cathode of bootstrap
diode and positive side of bootstrap capacitor to this pin. Internal charge pump supplies 30 μ A out of this pin to
maintain bootstrap supply. Internal circuitry clamps the bootstrap supply to approximately 12.8V.
High-side Enable input. Logic level input that when low overrides IN+/IN- (Pins 6 and 7) to put AHO and BHO drivers
(Pins 11 and 20) in low output state. When HEN is high AHO and BHO are controlled by IN+/IN- inputs. The pin can
be driven by signal levels of 0V to 15V (no greater than V DD ).
DISable input. Logic level input that when taken high sets all four outputs low. DIS high overrides all other inputs.
When DIS is taken low the outputs are controlled by the other inputs. The pin can be driven by signal levels of 0V to
15V (no greater than V DD ).
Chip negative supply, generally will be ground.
OUTput of the input control comparator. This output can be used for feedback and hysteresis.
Noninverting input of control comparator. If IN+ is greater than IN- (Pin 7) then ALO and BHO are low level outputs
and BLO and AHO are high level outputs. If IN+ is less than IN- then ALO and BHO are high level outputs and BLO
and AHO are low level outputs. DIS (Pin 3) high level will override IN+/IN- control for all outputs. HEN (Pin 2) low level
will override IN+/IN- control of AHO and BHO. When switching in four quadrant mode, dead time in a half bridge leg
is controlled by HDEL and LDEL (Pins 8 and 9).
Inverting input of control comparator. See IN+ (Pin 6) description.
High-side turn-on DELay. Connect resistor from this pin to V SS to set timing current that defines the turn-on delay of
both high-side drivers. The low-side drivers turn-off with no adjustable delay, so the HDEL resistor guarantees no
shoot-through by delaying the turn-on of the high-side drivers. HDEL reference voltage is approximately 5.1V.
Low-side turn-on DELay. Connect resistor from this pin to V SS to set timing current that defines the turn-on delay of
both low-side drivers. The high-side drivers turn-off with no adjustable delay, so the LDEL resistor guarantees no
shoot-through by delaying the turn-on of the low-side drivers. LDEL reference voltage is approximately 5.1V.
A High-side Bootstrap supply. External bootstrap diode and capacitor are required. Connect cathode of bootstrap
diode and positive side of bootstrap capacitor to this pin. Internal charge pump supplies 30 μ A out of this pin to
maintain bootstrap supply. Internal circuitry clamps the bootstrap supply to approximately 12.8V.
A High-side Output. Connect to gate of A High-side power MOSFET.
A High-side Source connection. Connect to source of A High-side power MOSFET. Connect negative side of
bootstrap capacitor to this pin.
A Low-side Output. Connect to gate of A Low-side power MOSFET.
A Low-side Source connection. Connect to source of A Low-side power MOSFET.
Positive supply to gate drivers. Must be same potential as V DD (Pin 16). Connect to anodes of two bootstrap diodes.
Positive supply to lower gate drivers. Must be same potential as V CC (Pin 15). De-couple this pin to V SS (Pin 4).
B Low-side Source connection. Connect to source of B Low-side power MOSFET.
B Low-side Output. Connect to gate of B Low-side power MOSFET.
B High-side Source connection. Connect to source of B High-side power MOSFET. Connect negative side of
bootstrap capacitor to this pin.
B High-side Output. Connect to gate of B High-side power MOSFET.
7
FN6397.2
March 20, 2007
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