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参数资料
| 型号： | ISL8483IP |
| 厂商： | INTERSIL CORP |
| 元件分类： | 通用总线功能 |
| 英文描述： | Octal D-Type Transparent Latches With 3-State Outputs 20-SOIC -40 to 85 |
| 中文描述： | LINE TRANSCEIVER, PDIP8 |
| 封装： | PLASTIC, MS-001BA, DIP-8 |
| 文件页数： | 7/16页 |
| 文件大小： | 507K |
| 代理商： | ISL8483IP |
7
Receiver Disable from Output Low
t
LZ
C
L
= 15pF, SW = V
CC
, Figure 5
Full
-
10
50
ns
Maximum Data Rate
f
MAX
Full
250
-
-
kbps
Time to Shutdown (ISL8483 only)
t
SHDN
Note 7
Full
50
200
600
ns
Driver Enable from Shutdown to
Output High (ISL8483 only)
t
ZH(SHDN)
C
L
= 100pF, SW = GND, Figure 3, Notes 7, 8
Full
-
-
2000
ns
Driver Enable from Shutdown to
Output Low (ISL8483 only)
t
ZL(SHDN)
C
L
= 100pF, SW = V
CC
, Figure 3, Notes 7, 8
Full
-
-
2000
ns
Receiver Enable from Shutdown to
Output High (ISL8483 only)
t
ZH(SHDN)
C
L
= 15pF, SW = GND, Figure 5, Notes 7, 9
Full
-
-
2500
ns
Receiver Enable from Shutdown to
Output Low (ISL8483 only)
t
ZL(SHDN)
C
L
= 15pF, SW = V
CC
, Figure 5, Notes 7, 9
Full
-
-
2500
ns
NOTES:
2. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless
otherwise specified.
3. Supply current specification is valid for loaded drivers when DE = 0V.
4. Applies to peak current. See “Typical Performance Curves” for more information.
5. When testing the ISL8483, keep RE = 0 to prevent the device from entering SHDN.
6. When testing the ISL8483, the RE signal high time must be short enough (typically <200ns) to prevent the device from entering SHDN.
7. The ISL8483 is put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 50ns, the parts are guaranteed not
to enter shutdown. If the inputs are in this state for at least 600ns, the parts are guaranteed to have entered shutdown. See “Low-Power
Shutdown Mode” section.
8. Keep RE = V
CC
, and set the DE signal low time >600ns to ensure that the device enters SHDN.
9. Set the RE signal high time >600ns to ensure that the device enters SHDN.
10. Devices meeting these limits are denoted as “single unit load (1 UL)” transceivers. The RS-485 standard allows up to 32 Unit Loads on the bus.
Test Circuits and Waveforms
FIGURE 1. DRIVER V
OD
AND V
OC
Electrical Specifications
Test Conditions: V
CC
= 4.5V to 5.5V; Unless Otherwise Specified.
Typicals are at V
CC
= 5V, T
A
= 25
o
C, Note 2
(Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
TEMP
(
o
C)
MIN
TYP
MAX
UNITS
D
DE
DI
V
CC
V
OD
V
OC
R
R
Z
Y
ISL8483, ISL8485, ISL8488, ISL8489, ISL8490, ISL8491
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PDF描述 |
|---|---|
| ISL8485CB | Octal D-Type Transparent Latches With 3-State Outputs 20-TSSOP -40 to 85 |
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| ISL8485IP | 5V, Low Power, High Speed or Slew Rate Limited, RS-485/RS-422 Transceivers |
| ISL8490IB-T | 5V, Low Power, High Speed or Slew Rate Limited, RS-485/RS-422 Transceivers |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL8483IPZ | 功能描述:IC TXRX RS-485/422 5V 8-PDIP RoHS:是 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:- 标准包装:250 系列:- 类型:收发器 驱动器/接收器数:2/2 规程:RS232 电源电压:3 V ~ 5.5 V 安装类型:表面贴装 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:带卷 (TR) |
| ISL8484 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Ultra Low ON-Resistance, +1.65V to +4.5V, Single Supply, Dual SPDT Analog Switch |
| ISL8484_06 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Ultra Low ON-Resistance, +1.65V to +4.5V, Single Supply, Dual SPDT Analog Switch |
| ISL8484_07 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Ultra Low ON-Resistance, +1.65V to +4.5V, Single Supply, Dual SPDT Analog Switch |
| ISL8484IR | 功能描述:IC SWITCH DUAL SPDT 10TDFN RoHS:否 类别:集成电路 (IC) >> 接口 - 模拟开关，多路复用器，多路分解器 系列:- 产品培训模块:Obsolescence Mitigation Program 标准包装:2,500 系列:- 功能:- 电路:2 x SPST 导通状态电阻:20 欧姆 电压电源:单电源 电压 - 电源，单路/双路(±):3 V ~ 5.5 V 电流 - 电源:4.1mA 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:10-WFDFN 裸露焊盘 供应商设备封装:10-TDFN-EP（3x3） 包装:带卷 (TR) |
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