参数资料
型号: ISL8502AIRZ
厂商: Intersil
文件页数: 15/20页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 2A 24QFN
标准包装: 75
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.6 V ~ 14 V
输入电压: 5V,5.5 V ~ 14 V
PWM 型: 电压模式
频率 - 开关: 500kHz ~ 1.2MHz
电流 - 输出: 2A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-VFQFN 裸露焊盘
包装: 管件
供应商设备封装: 24-QFN(4x4)
ISL8502A
voltage of the regulator. The value for the feedback resistor is
typically between 1k Ω and 10k Ω .
During removal of the same output load, the energy stored in the
inductor is dumped into the output capacitors. This energy dumping
R 4 = ----------------------------------
R 1 × 0.6V
V OUT – 0.6V
(EQ. 4)
creates a temporary hump in the output voltage. This hump, as with
the sag, can be attributed to the total amount of capacitance on the
output. Figure 35 shows a typical response to a load transient.
Δ V ESR = ESR ? I tran
Δ V ESL = ESL ? ---------------
L out ? I tran
Δ V SAG = --------------------------------------------------
L out ? I tran
C out ? V out
Δ V HUMP = --------------------------------
--------------------------------- + ESR ? I tran
dt
Δ V o
If the output voltage desired is 0.6V, then R 4 is left unpopulated.
Output Capacitor Selection
An output capacitor is required to filter the inductor current and
supply the load transient current. The filtering requirements are a
function of the switching frequency and the ripple current. The load
transient requirements are a function of the slew rate (di/dt) and the
magnitude of the transient load current. These requirements are
generally met with a mix of capacitors and careful layout.
High frequency capacitors initially supply the transient and slow the
current load rate seen by the bulk capacitors. The bulk filter
capacitor values are generally determined by the ESR (Effective
Series Resistance) and voltage rating requirements rather than
actual capacitance requirements.
High frequency decoupling capacitors should be placed as close to
the power pins of the load as physically possible. Be careful not to
add inductance in the circuit board wiring that could cancel the
usefulness of these low inductance components. Consult with the
manufacturer of the load on specific decoupling requirements.
The shape of the output voltage waveform during a load transient
that represents the worst-case loading conditions ultimately
determines the number of output capacitors and their type. When
this load transient is applied to the converter, most of the energy
required by the load is initially delivered from the output capacitors.
This is due to the finite amount of time required for the inductor
current to slew up to the level of the output current required by the
load. This phenomenon results in a temporary dip in the output
voltage. At the very edge of the transient, the Equivalent Series
Inductance (ESL) of each capacitor induces a spike that adds on top
of the existing voltage drop due to the Equivalent Series Resistance
(ESR).
The amplitudes of the different types of voltage excursions can
be approximated using Equation 5.
dI tran
dt
2
C out ? ( V in – V out )
2
(EQ. 5)
where: I tran = Output Load Current Transient, and C out = Total
Output Capacitance.
In a typical converter design, the ESR of the output capacitor
bank dominates the transient response. The ESR and ESL
typically are the major contributing factors in determining the
output capacitance. The number of output capacitors can be
determined by using Equation 6, which relates the ESR and ESL
of the capacitors to the transient load step and the voltage limit
(DVo):
ESL ? d I tran
Number of Capacitors = -----------------------------------------------------------------------
(EQ. 6)
If DV SAG or DV HUMP is found to be too large for the output
voltage limits, then the amount of capacitance may need to be
increased. In this situation, a trade-off between output
inductance and output capacitance may be necessary.
The ESL of the capacitors, which is an important parameter in
the previous equations, is not usually listed in databooks.
Practically, it can be approximated using Equation 7 if an
Impedance vs Frequency curve is given for a specific capacitor:
ESL = ----------------------------------------
C ( 2 ? π ? f res )
V OUT
DV HUMP
1
2
(EQ. 7)
DV ESR
I OUT
DV SAG
DV ESL
I TRAN
where f res is the frequency at which the lowest impedance is
achieved (resonant frequency).
The ESL of the capacitors becomes a concern when designing
circuits that supply power to loads with high rates of change in
the current.
Output Inductor Selection
The output inductor is selected to meet the output voltage ripple
requirements and to minimize the converter’s response time to
FIGURE 35. TYPICAL TRANSIENT RESPONSE
After the initial spike, attributable to the ESR and ESL of the
the load transient. The inductor value determines the converter’s
ripple current, and the ripple voltage is a function of the ripple
current. The ripple voltage and current are approximated by using
Equation 8:
capacitors, the output voltage experiences sag. This sag is a direct
consequence of the amount of capacitance on the output.
DI =
VIN - VOUT
Fs x L
x
VOUT
VIN
DVOUT = DI x ESR
(EQ. 8)
15
FN7940.0
October 21, 2011
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