参数资料
型号: ISL85402IRZ
厂商: Intersil
文件页数: 19/22页
文件大小: 0K
描述: IC REG BUCK BOOST SYNC ADJ 20QFN
标准包装: 75
类型: 降压(降压),升压(升压)
输出类型: 可调式
输出数: 1
输出电压: 可调至 0.8V
输入电压: 3 V ~ 36 V
PWM 型: 电流模式
频率 - 开关: 200kHz ~ 2.2MHz
电流 - 输出: 2.5A
同步整流器: 两者兼有
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 20-VFQFN 裸露焊盘
包装: 管件
供应商设备封装: 20-QFN(4x4)
ISL85402
3R 1
R o – 3R c
Case B: ESR zero --------------------- larger than (0.35 to 0.5)f s
R o C o – 3R c C o
C 3 = -------------------------------------
3R c R 1
R 3 = -----------------------
1
2 π R c C o
(EQ. 27)
(EQ. 28)
80
60
40
Loop Gain
20
C 3 = -------------------------------------------------
R 3 = ----------------------------------------
0.33R o C o f s – 0.46
f s R 1
R 1
0.73R o C o f s – 1
2. Derive R2 and C1.
(EQ. 29)
(EQ. 30)
0
-20
-40
-60
2 π f c R t R 1 C
The loop gain L v (S) at cross over frequency of f c has unity gain.
Therefore, C 1 is determined by Equation 31.
( R 1 + R 3 ) C 3
(EQ. 31)
C 1 = ---------------------------------
o
100
180
1,000
10,000
Frequency
Phase Margin
100,000
1,000,000
The compensator zero ω CZ1 can boost the phase margin and
bandwidth. To put ω CZ1 at 2 times of cross cover frequency f c is a
good start point. It can be adjusted according to specific design.
R1 can be derived from Equation 32.
160
140
120
100
R 2 = -------------------
1
4 π f c C 1
(EQ. 32)
80
60
Example: V in = 12V, V o = 5V, I o = 2A, fs = 500kHz,
C o = 60μF/3m Ω , L = 10μH, R t = 0.20V/A, f c = 50kHz, R1=105k,
R BIAS = 20k Ω .
40
20
Select the crossover frequency to be 35kHz. Since the output
0
100
1,000
10,000
100,000
1,000,000
capacitors are all ceramic, use Equation 29 and 30 to derive R3
to be 20k and C3 to be 470pF.
Then use Equation 31 and 32 to calculate C1 to be 180pF and
R2 to be 12.7k. Select 150pF for C1 and 15k for R2.
There is approximately 30pF parasitic capacitance between
COMP to FB pins that contributes to a high frequency pole.
Figure 31 shows the simulated bode plot of the loop. It is shown
that it has 26kHz loop bandwidth with 70° phase margin and -28
dB gain margin.
Note in applications where the PFM mode is desired especially
when type III compensation network is used, the value of the
capacitor between the COMP pin and the FB pin (not the
capacitor in series with the resistor between COMP and FB)
should be minimal to reduce the noise coupling for proper PFM
operation. No external capacitor between COMP and FB is
recommended at PFM applications.
19
Frequency
FIGURE 31. SIMULATED LOOP BODE PLOT
Boost Inductor
Besides the need to sustain the current ripple to be within a
certain range (30% to 50%), the boost inductor current at its
soft-start is a more important perspective to be considered in
selection of the boost inductor. Each time the boost starts up,
there is a fixed 500μs soft-start time when the duty cycle
increases linearly from t MIN(ON) *Fs to ~50%. Before and after
boost start-up, the boost output voltage will jump from
V IN_BOOST to voltage (V IN_BOOST + V OUT_BUCK ). The design target
in boost soft-start is to ensure the boost input current is
sustained to minimum but capable to charge the boost output
voltage to have a voltage step equaling to V OUT_BUCK . A big
inductor will block the inductor current to increase and not high
enough to be able to charge the output capacitor to the final
steady state value (V IN_BOOST + V OUT_BUCK ) within 500μs. A
6.8μH inductor is a good starting point for its selection in design.
The boost inductor current at start-up must be checked by
oscilloscope to ensure it is under acceptable range. It is
suggested to run the iSim model, which is available on the
internet to assist in designing the proper inductor value.
FN7640.1
April 25, 2013
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ISL85402IRZ-TK 功能描述:IC REG BUCK BOOST SYNC ADJ 20QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:降压(降压) 输出类型:两者兼有 输出数:1 输出电压:5V,1 V ~ 10 V 输入电压:3.5 V ~ 28 V PWM 型:电流模式 频率 - 开关:220kHz ~ 1MHz 电流 - 输出:600mA 同步整流器:无 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:16-SSOP(0.154",3.90mm 宽) 包装:带卷 (TR) 供应商设备封装:16-QSOP
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