参数资料
型号: ISL8845AMBZ-T
厂商: Intersil
文件页数: 10/15页
文件大小: 0K
描述: IC REG CTRLR BST FLYBK ISO 8SOIC
标准包装: 2,500
PWM 型: 电流模式
输出数: 1
频率 - 最大: 2MHz
占空比: 50%
电源电压: 9 V ~ 30 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -55°C ~ 125°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
包装: 带卷 (TR)
ISL8840A, ISL8841A, ISL8842A, ISL8843A, ISL8844A, ISL8845A
Typical Performance Curves (Continued)
1.001
10 3
1.000
0.998
0.997
100
10
100pF
220pF
330pF
470pF
1.0nF
2.2nF
3.3nF
4.7nF
0.996
-60 -40 -20
0 20 40 60 80 100 120 140
TEMPERATURE (°C)
1
1
10
RT (k Ω )
6.8nF
100
FIGURE 3. EA REFERENCE vs TEMPERATURE
Pin Descriptions
RTCT - This is the oscillator timing control pin. The
operational frequency and maximum duty cycle are set by
connecting a resistor, RT, between VREF and this pin and a
timing capacitor, CT, from this pin to GND. The oscillator
produces a sawtooth waveform with a programmable
frequency range up to 2.0MHz. The charge time, t C , the
discharge time, t D , the switching frequency, f, and the
maximum duty cycle, Dmax, can be approximated from the
following equations:
FIGURE 4. RESISTANCE FOR CT CAPACITOR VALUES GIVEN
OUT - This is the drive output to the power switching device.
It is a high current output capable of driving the gate of a
power MOSFET with peak currents of 1.0A . This GATE
output is actively held low when V DD is below the UVLO
threshold.
V DD - V DD is the power connection for the device. The total
supply current will depend on the load applied to OUT. Total
I DD current is the sum of the operating current and the
average output current. Knowing the operating frequency, f,
and the MOSFET gate charge, Qg, the average output
t C ≈ 0.533 ? RT ? CT
(EQ. 1)
current can be calculated from:
I OUT = Qg × f
(EQ. 5)
t D ≈ – RT ? CT ? In ? --------------------------------------------- ?
f = 1 ? ( tC + tD )
D = t C ? f
0.008 ? RT – 3.83
? 0.008 ? RT – 1.71 ?
(EQ. 2)
(EQ. 3)
(EQ. 4)
To optimize noise immunity, bypass V DD to GND with a
ceramic capacitor as close to the V DD and GND pins as
possible.
VREF - The 5.00V reference voltage output. +1.0/-1.5%
tolerance over line, load and operating temperature. Bypass
The formulae have increased error at higher frequencies due
to propagation delays. Figure 4 may be used as a guideline
in selecting the capacitor and resistor values required for a
given frequency.
COMP - COMP is the output of the error amplifier and the
input of the PWM comparator. The control loop frequency
compensation network is connected between the COMP and
FB pins.
FB - The output voltage feedback is connected to the
inverting input of the error amplifier through this pin. The
non-inverting input of the error amplifier is internally tied to a
reference voltage.
CS - This is the current sense input to the PWM comparator.
The range of the input signal is nominally 0V to 1.0V and has
an internal offset of 100mV.
GND - GND is the power and small signal reference ground
for all functions.
10
to GND with a 0.1 μ F to 3.3 μ F capacitor to filter this output as
needed.
Functional Description
Features
The ISL884xA current mode PWM makes an ideal choice for
low-cost flyback and forward topology applications. With its
greatly improved performance over industry standard parts,
it is the obvious choice for new designs or existing designs
which require updating.
Oscillator
The ISL884xA has a sawtooth oscillator with a
programmable frequency range to 2MHz, which can be
programmed with a resistor from VREF and a capacitor to
GND on the RTCT pin. (Please refer to Figure 4 for the
resistor and capacitance required for a given frequency.)
FN6320.3
April 18, 2007
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