参数资料
型号: ISL9008AIRUMZ-T
厂商: Intersil
文件页数: 8/11页
文件大小: 0K
描述: IC REG LDO 3V .15A 6-UTDFN
标准包装: 3,000
稳压器拓扑结构: 正,固定式
输出电压: 3V
输入电压: 最高 6.5V
电压 - 压降(标准): 0.2V @ 150mA
稳压器数量: 1
电流 - 输出: 150mA(最小)
电流 - 限制(最小): 175mA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 6-UFDFN 裸露焊盘
供应商设备封装: 6-UTDFN(1.6x1.6)
包装: 带卷 (TR)
ISL9008A
Block Diagram
VIN
VO
GND
UVLO
CONTROL
LOGIC
SHORT CIRCUIT,
THERMAL PROTECTION,
SOFT-START
+
-
SD
BANDGAP AND
TEMPERATURE
SENSOR
VOLTAGE AND
REFERENCE
GENERATOR
1.0V
0.94V
0.9V
GND
Functional Description
The ISL9008A contains all circuitry required to implement a
high performance LDO. High performance is achieved
through a circuit that delivers fast transient response to
varying load conditions. In a quiescent condition, the
ISL9008A adjusts its biasing to achieve the lowest standby
current consumption.
The device also integrates current limit protection, smart
thermal shutdown protection, and soft-start. Smart Thermal
shutdown protects the device against overheating. Soft-start
minimizes start-up input current surges without causing
excessive device turn-on time.
Power Control
The ISL9008A has an enable pin, EN, to control power to the
LDO output. When EN is low, the device is in shutdown
mode. In this condition, all on-chip circuits are off, and the
device draws minimum current, typically less than 0.3 μ A.
When the EN pin goes high, the device first polls the output
of the UVLO detector to ensure that VIN voltage is at least
2.1V (typical). Once verified, the device initiates a start-up
sequence. During the start-up sequence, trim settings are
first read and latched. Then, sequentially, the bandgap,
reference voltage and current generation circuitry turn on.
Once the references are stable, the LDO powers up.
During operation, whenever the VIN voltage drops below
about 1.84V, the ISL9008A immediately disables the LDO
output. When VIN rises back above 2.1V (assuming the EN
pin is high), the device re-initiates its start-up sequence and
LDO operation resumes automatically.
8
Reference Generation
The reference generation circuitry includes a trimmed
bandgap, a trimmed voltage reference divider, a trimmed
current reference generator, and an RC noise filter.
The bandgap generates a zero temperature coefficient (TC)
voltage for the regulator reference and other voltage references
required for current generation and over-temperature detection.
A current generator provides references required for
adaptive biasing as well as references for LDO output
current limit and thermal shutdown determination.
LDO Regulation and Programmable Output Divider
The LDO Regulator is implemented with a high-gain
operational amplifier driving a PMOS pass transistor. The
design of the ISL9008A provides a regulator that has low
quiescent current, fast transient response, and overall
stability across all operating and load current conditions.
LDO stability is guaranteed for a 1μF to 4.7μF output
capacitor that has a tolerance better than 20% and ESR less
than 200m Ω . The design is performance-optimized for a 1μF
capacitor. Unless limited by the application, use of an output
capacitor value above 4.7μF is not recommended as LDO
performance improvement is minimal.
Soft-start circuitry integrated into each LDO limits the initial
ramp-up rate to about 30μs/V to minimize current surge. The
ISL9008A provides short-circuit protection by limiting the
output current to about 265mA (typ).
The LDO uses an independently trimmed 1V reference as its
input. An internal resistor divider drops the LDO output
voltage down to 1V. This is compared to the 1V reference for
regulation. The resistor division ratio is programmed in the
factory.
FN6300.4
March 11, 2008
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