参数资料
| 型号： | ISL90842WIV1427Z |
| 厂商： | Intersil |
| 文件页数： | 8/10页 |
| 文件大小： | 0K |
| 描述： | IC DCP 256-TAP 10KOHM TSSOP-14 |
| 标准包装： | 95 |
| 系列： | XDCP™ |
| 接片： | 256 |
| 电阻（欧姆）： | 10k |
| 电路数： | 4 |
| 温度系数： | 标准值 ±45 ppm/°C |
| 存储器类型： | 易失 |
| 接口： | I²C（设备位址） |
| 电源电压： | 2.7 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 14-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 14-TSSOP |
| 包装： | 管件 |
7
FN8096.1
January 16, 2006
Principles of Operation
The ISL90842 is an integrated circuit incorporating four
DCPs with their associated registers, and an I2C serial
interface providing direct communication between a host
and the DCPs.
DCP Description
Each DCP is implemented with a combination of resistor
elements and CMOS switches. The physical ends of each
DCP are equivalent to the fixed terminals of a mechanical
potentiometer. The RW pin of each DCP is connected to
intermediate nodes, and is equivalent to the wiper terminal
of a mechanical potentiometer. The position of the wiper
terminal within the DCP is controlled by an 8-bit volatile
Wiper Register (WR). Each DCP has its own WR. When the
WR of a DCP contains all zeroes (WR<7:0>: 00h), its wiper
terminal (RW) is closest to its RL terminal. When the WR of a
DCP contains all ones (WR<7:0>: FFh), its wiper terminal
(RW) is furthest from the RH terminal. As the value of the
WR increases from all zeroes (00h) to all ones (255
decimal), the wiper moves monotonically from the position
furthest from RH to a position closer to RH. At the same time,
the resistance between RH and RW decreases
monotonically. Note that the RL terminals for all four pots are
not connected (left floating).
While the ISL90842 is being powered up, all four WRs are
reset to 80h (128 decimal), which locates RW roughly at a
position which yields a rheostat setting that is about 1/2 of
RTOTAL.
The WRs can be read or written directly using the I2C serial
interface as described in the following sections. The I2C
interface Address Byte has to be set to 00h, 01h, 02h, and
03h to access the WR of DCP0, DCP1, DCP2, and DCP3,
respectively.
I2C Serial Interface
The ISL90842 supports a bidirectional bus oriented protocol.
The protocol defines any device that sends data onto the
bus as a transmitter and the receiving device as the receiver.
The device controlling the transfer is a master and the
device being controlled is the slave. The master always
initiates data transfers and provides the clock for both
transmit and receive operations. Therefore, the ISL90842
operates as a slave device in all applications.
All communication over the I2C interface is conducted by
sending the MSB of each byte of data first.
Protocol Conventions
Data states on the SDA line must change only during SCL
LOW periods. SDA state changes during SCL HIGH are
reserved for indicating START and STOP conditions (See
Figure 9). On power-up of the ISL90842 the SDA pin is in the
input mode.
All I2C interface operations must begin with a START
condition, which is a HIGH to LOW transition of SDA while
SCL is HIGH. The ISL90842 continuously monitors the SDA
and SCL lines for the START condition and does not
respond to any command until this condition is met (See
Figure 9). A START condition is ignored during the power-up
of the device.
All I2C interface operations must be terminated by a STOP
condition, which is a LOW to HIGH transition of SDA while
SCL is HIGH (See Figure 9). A STOP condition at the end of
a read operation, or at the end of a write operation places
the device in its standby mode.
An ACK, Acknowledge, is a software convention used to
indicate a successful data transfer. The transmitting device,
either master or slave, releases the SDA bus after
transmitting eight bits. During the ninth clock cycle, the
receiver pulls the SDA line LOW to acknowledge the
reception of the eight bits of data (See Figure 10).
FIGURE 7. FREQUENCY RESPONSE (2.2MHz)
FIGURE 8. LARGE SIGNAL SETTLING TIME
Typical Performance Curves (Continued)
TAP POSITION = MID POINT
RTOTAL=9.4K
OUTPUT
INPUT
SCL
SIGNAL AT WIPER
(WIPER UNLOADED
MOVEMENT FROM
ffh TO 00h)
ISL90842
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL90842WIV1427Z-TK | 功能描述:IC POT DGTL QUAD 10K OHM 14TSSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数字电位器 系列:XDCP™ 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 接片:256 电阻（欧姆）:100k 电路数:1 温度系数:标准值 35 ppm/°C 存储器类型:非易失 接口:3 线串口 电源电压:2.7 V ~ 5.25 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:8-WDFN 裸露焊盘 供应商设备封装:8-TDFN-EP（3x3） 包装:剪切带 (CT) 产品目录页面:1399 (CN2011-ZH PDF) 其它名称:MAX5423ETA+TCT |
| ISL90843 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Quad Digital Controlled Potentiometers (XDCP⑩) |
| ISL90843UIU1027Z | 功能描述:IC XDCP 256-TAP 50OHM MSOP-10 RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数字电位器 系列:XDCP™ 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 接片:32 电阻（欧姆）:50k 电路数:1 温度系数:标准值 50 ppm/°C 存储器类型:易失 接口:3 线串行（芯片选择，递增，增/减） 电源电压:2.7 V ~ 5.5 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-6 细型，TSOT-23-6 供应商设备封装:TSOT-23-6 包装:带卷 (TR) |
| ISL90843UIU1027Z-TK | 功能描述:IC XDCP 256-TAP 50OHM 10-MSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数字电位器 系列:XDCP™ 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 接片:32 电阻（欧姆）:50k 电路数:1 温度系数:标准值 50 ppm/°C 存储器类型:易失 接口:3 线串行（芯片选择，递增，增/减） 电源电压:2.7 V ~ 5.5 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-6 细型，TSOT-23-6 供应商设备封装:TSOT-23-6 包装:带卷 (TR) |
| ISL90843WIU1027Z | 功能描述:IC XDCP 256-TAP 10OHM MSOP-10 RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数字电位器 系列:XDCP™ 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 接片:32 电阻（欧姆）:50k 电路数:1 温度系数:标准值 50 ppm/°C 存储器类型:易失 接口:3 线串行（芯片选择，递增，增/减） 电源电压:2.7 V ~ 5.5 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-6 细型，TSOT-23-6 供应商设备封装:TSOT-23-6 包装:带卷 (TR) |
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