参数资料
| 型号： | ISL9110AIITNZ-T |
| 厂商： | Intersil |
| 文件页数： | 2/16页 |
| 文件大小： | 0K |
| 描述： | IC VOLTAGE REGULATOR |
| 标准包装： | 3,000 |
| 系列： | * |
ISL9110A
Block Diagram
LX1
A2 B2
LX2
A4 B4
PVIN
A1
B1
A5
B5
VOUT
EN C2
VIN C1
BAT D2
V REF
EN
EN
PVIN
MONITOR
THERMAL
GATE
DRIVERS
& ANTI-
SHOOT THRU
VOUT
CLAMP
SOFT
DISCHARGE
EN
A3 PGND
B3
C3
C4
MODE/SYNC D3
SHUTDOWN
PWM
CONTROL
CURRENT
DETECT
EN
VOUT
EN
MONITOR
D1 PG
D5 FB
EN
OSC
C5 D4
GND
ERROR
AMP
REF
VOLTAGE
PROG.
Pin Configurations
ISL9110A
(20 BALL WLCSP)
TOP VIEW
Pin Descriptions
PIN
PIN # NAMES
DESCRIPTION
A5, B5
VOUT
Buck/boost output. Connect a 10μF capacitor to
A1
B1
C1
D1
PGND.
A2
B2
C2
D2
A4, B4
LX2
Inductor connection, output side.
A3, B3,
PGND
Power ground for high switching current.
A3
B3
C3
D3
C3, C4
A4
B4
C4
D4
A2, B2
LX1
Inductor connection, input side.
A1, B1
PVIN
Power input. Range: 1.8V to 5.5V. Connect a 10μF
A5
B5
C5
D5
C1
D1
VIN
PG
capacitor to PGND.
Supply input. Range: 1.8V to 5.5V.
Open drain output. Provides output-power-good
status.
2
D2
C2
D3
C5, D4
D5
BAT
EN
MODE/
SYNC
GND
FB
Open drain output. Provides input-power-good
status.
Logic input, drive high to enable device.
Logic input, high for auto PFM mode. Low for forced
PWM operation.
Ext. clock sync input. Range: 2.75MHz to 3.25MHz.
Analog ground pin.
Voltage feedback pin.
FN8299.1
June 8, 2012
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相关代理商/技术参数 |
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| ISL9110BIRTAZ | 制造商:Intersil Corporation 功能描述:1.2A SINGLE INDUCTOR BUCK-BOOST, ADJ V, HICCUP DISABLED, 12L - Rail/Tube |
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