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| 型号： | ISL9440BIRZ-T |
| 厂商： | Intersil |
| 文件页数： | 20/24页 |
| 文件大小： | 0K |
| 描述： | IC REG QD BCK/LINEAR SYNC 32-QFN |
| 产品培训模块： | Solutions for Industrial Control Applications |
| 标准包装： | 6,000 |
| 拓扑： | 降压（降压）同步（3），线性（LDO）（1） |
| 功能： | 任何功能 |
| 输出数： | 4 |
| 频率 - 开关： | 300kHz |
| 电压/电流 - 输出 1： | 控制器 |
| 电压/电流 - 输出 2： | 控制器 |
| 电压/电流 - 输出 3： | 控制器 |
| 带 LED 驱动器： | 无 |
| 带监控器： | 无 |
| 带序列发生器： | 无 |
| 电源电压： | 4.5 V ~ 24 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-VFQFN 裸露焊盘 |
| 供应商设备封装： | * |
| 包装： | 带卷 (TR) |
ISL9440B, ISL9440C
resistor depending on the maximum operating load current
and the value of the MOSFETs r DS(ON) .
compensation plenty of phase margin is easily achieved due
to zero-pole pair phase ‘boost’.
( I MAX ) ( r DS ( ON ) )
30 μ A
R CS ≥ -----------------------------------------------
(EQ. 7)
Conditional stability may occur only when the main load pole
is positioned too much to the left side on the frequency axis
Choosing R CS to provide 30μA of current to the current
sample and hold circuitry is recommended, but values down
to 2μA and up to 100μA can be used. The higher sampling
current will help to stabilize the loop.
Due to the current loop feedback, the modulator has a single
pole response with -20dB slope at a frequency determined
by the load, as shown in Equation 8.
due to excessive output filter capacitance. In this case, the
ESR zero placed within the 1.2kHz to 30kHz range gives
some additional phase ‘boost’. Some phase boost can also
be achieved by connecting capacitor C Z in parallel with the
upper resistor R 1 of the divider that sets the output voltage
value. Please refer to “Output Capacitor Selection” on
page 22 and “Input Capacitor Selection” on page 23 for
further details.
F PO = ---------------------------------
1
2 π ? R O ? C O
(EQ. 8)
Linear Regulator
The linear regulator controller is a trans-conductance
Where, R O is load resistance and C O is load capacitance.
For this type of modulator, a Type 2 compensation circuit is
usually sufficient.
Figure 42 shows a Type 2 amplifier and its response along
with the responses of the current mode modulator and the
converter. The Type 2 amplifier, in addition to the pole at
origin, has a zero-pole pair that causes a flat gain region at
frequencies in between the zero and the pole.
amplifier with a nominal gain of 2A/V. The N-Channel
MOSFET output buffer can sink a minimum of 50mA.
The reference voltage is 0.8V. With 0V differential at its
input, the controller sinks 21mA of current. For better load
regulation, it is recommended that the resistor from the LDO
input to the base of the PNP (or gate of the PFET) is set so
that the sink current at G4 pin is within 9mA to 31mA over
the entire load and temperature range.
F Z = ------------------------------- = 6kHz
F P = ------------------------------- = 600kHz
1
2 π ? R 2 ? C 1
1
2 π ? R 1 ? C 2
C2
(EQ. 9)
(EQ. 10)
An external PNP transistor or P-Channel MOSFET pass
device can be used. The dominant pole for the loop can be
placed at the base of the PNP (or gate of the PFET), as a
capacitor from emitter-to-base (source to gate of a PFET).
Better load transient response is achieved however, if the
dominant pole is placed at the output with a capacitor to
ground at the output of the regulator.
CONVERTER
R1
R2
C1
Under no-load conditions, leakage currents from the pass
transistors supply the output capacitors, even when the
EA
G M = 17.5dB
MODULATOR
F PO
F Z
TYPE 2 EA
G EA = 18dB
F C
F P
transistor is off. Generally, this is not a problem since the
feedback resistor drains the excess charge. However,
charge may build up on the output capacitor making V LDO
rise above its set point. Care must be taken to insure that the
feedback resistor ’s current exceeds the pass transistors
leakage current over the entire temperature range.
60
50
40
FIGURE 42. FEEDBACK LOOP COMPENSATION
The zero frequency, the amplifier high-frequency gain, and
the modulator gain are chosen to satisfy most typical
applications. The crossover frequency will appear at the
point where the modulator attenuation equals the amplifier
30
20
10
high frequency gain. The only task that the system designer
has to complete is to specify the output filter capacitors to
position the load main pole somewhere within one decade
0
0.79
0.8
0.81 0.82 0.83
FEEDBACK VOLTAGE (V)
0.84
0.85
lower than the amplifier zero frequency. With this type of
20
FIGURE 43. LINEAR CONTROLLER GAIN
FN6799.3
June 24, 2010
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| ISL9440CEVAL1Z | 功能描述:EVAL BOARD 1 FOR ISL9440C RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:* 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:True Shutdown™ 主要目的:DC/DC，步升 输出及类型:1，非隔离 功率 - 输出:- 输出电压:- 电流 - 输出:1A 输入电压:2.5 V ~ 5.5 V 稳压器拓扑结构:升压 频率 - 开关:3MHz 板类型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
| ISL9440CIRZ | 功能描述:IC REG QD BCK/LINEAR SYNC 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 + 切换式 系列:- 标准包装:2,500 系列:- 拓扑:降压（降压）同步（2），线性（LDO）（1） 功能:任何功能 输出数:3 频率 - 开关:300kHz 电压/电流 - 输出 1:控制器 电压/电流 - 输出 2:控制器 电压/电流 - 输出 3:控制器 带 LED 驱动器:无 带监控器:无 带序列发生器:是 电源电压:4.5 V ~ 24 V 工作温度:-40°C ~ 85°C 安装类型:* 封装/外壳:28-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:* 包装:带卷 (TR) 其它名称:ISL6402IVZ-TTR |
| ISL9440CIRZ-T | 功能描述:IC REG QD BCK/LINEAR SYNC 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 + 切换式 系列:- 标准包装:2,500 系列:- 拓扑:降压（降压）同步（2），线性（LDO）（1） 功能:任何功能 输出数:3 频率 - 开关:300kHz 电压/电流 - 输出 1:控制器 电压/电流 - 输出 2:控制器 电压/电流 - 输出 3:控制器 带 LED 驱动器:无 带监控器:无 带序列发生器:是 电源电压:4.5 V ~ 24 V 工作温度:-40°C ~ 85°C 安装类型:* 封装/外壳:28-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:* 包装:带卷 (TR) 其它名称:ISL6402IVZ-TTR |
| ISL9440EVAL2Z | 功能描述:EVAL BOARD FOR ISL9940 RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:- 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:True Shutdown™ 主要目的:DC/DC，步升 输出及类型:1，非隔离 功率 - 输出:- 输出电压:- 电流 - 输出:1A 输入电压:2.5 V ~ 5.5 V 稳压器拓扑结构:升压 频率 - 开关:3MHz 板类型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
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