参数资料
| 型号： | ISL97536IUZ |
| 厂商： | Intersil |
| 文件页数： | 7/8页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 1A 10MSOP |
| 产品培训模块： | Solutions for Industrial Control Applications |
| 标准包装： | 980 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.8 V ~ 6 V |
| 输入电压： | 2.5 V ~ 6 V |
| PWM 型： | 电压模式 |
| 频率 - 开关： | 1.4MHz |
| 电流 - 输出： | 1A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-TFSOP，10-MSOP（0.118"，3.00mm 宽） |
| 包装： | 管件 |
| 供应商设备封装： | 10-MSOP |
ISL97536
Component Selection
Because of the fixed internal compensation, the component
choice is relatively narrow. For a regulator with fixed output
voltage, only two capacitors and one inductor are required.
Capacitors must be chosen in the range of 10μF to 40μF,
multilayer ceramic capacitors with X5R or X7R rating for
both the input and output capacitors, and inductors in the
range of 1.5μH to 2.2μH.
The RMS current present at the input capacitor is decided by
Equation 3:
Layout Considerations
The layout is very important for the converter to function
properly. The following PC layout guidelines should be
followed:
1. Separate the Power Ground ( ) and Signal Ground
( ); connect them only at one point right at the pins
2. Place the input capacitor as close to V IN and PGND pins
as possible
3. Make the following PC traces as small as possible:
- from LX pin to L
V O × ( V IN – V O )
I INRMS = ----------------------------------------------- × I O
V IN
(EQ. 3)
- from C O to PGND
4. If used, connect the trace from the FB pin to R 1 and R 2
as close as possible
This is about half of the output current I O for all the V O . This
input capacitor must be able to handle this current.
The inductor peak-to-peak ripple current is given as shown
in Equation 4:
5. Maximize the copper area around the PGND pin
6. Place several via holes under the chip to additional
ground plane to improve heat dissipation
The demo board is a good example of layout based on this
outline.
Δ I IL = --------------------------------------------
( V IN – V O ) × V O
L × V IN × f S
(EQ. 4)
L is the inductance
f S the switching frequency (nominally 1.4MHz)
The inductor must be able to handle I O for the RMS load
current, and to assure that the inductor is reliable, it must
handle the 2A surge current that can occur during a current
limit condition.
In addition to decoupling capacitors and inductor value, it is
important to properly size the phase-lead capacitor C 4
(Refer to the “Pinout and Typical Application Diagram” on
page 1). The phase-lead capacitor creates additional phase
margin in the control loop by generating a zero and a pole in
the transfer function. As a general rule of thumb, C 4 should
be sized to start the phase-lead at a frequency of ~2.5kHz.
The zero will always appear at lower frequency than the pole
and follow Equation 5:
f Z = ----------------------
1
2 π R 2 C 4
(EQ. 5)
Over a normal range of R 2 (~10k to100k), C 4 will range from
~470pF to 4700pF. The pole frequency cannot be set once
the zero frequency is chosen as it is dictated by the ratio of
R 1 and R 2 , which is solely determined by the desired output
set point. Equation 6 shows the pole frequency relationship:
f P = ---------------------------------------
1
2 π ( R 1 R 2 ) C 4
7
(EQ. 6)
FN6279.1
November 2, 2007
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| ISL97536IUZ-T | 功能描述:IC REG BUCK SYNC ADJ 1A 10MSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:50 系列:- 类型:升压（升压） 输出类型:可调式 输出数:1 输出电压:5 V ~ 25 V 输入电压:2.3 V ~ 5.5 V PWM 型:电流模式 频率 - 开关:600kHz，1.2MHz 电流 - 输出:1A 同步整流器:无 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:8-TSSOP，8-MSOP（0.118"，3.00mm 宽） 包装:管件 供应商设备封装:8-MSOP |
| ISL97536IUZ-TK | 功能描述:IC REG BUCK SYNC ADJ 1A 10MSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:50 系列:- 类型:升压（升压） 输出类型:可调式 输出数:1 输出电压:5 V ~ 25 V 输入电压:2.3 V ~ 5.5 V PWM 型:电流模式 频率 - 开关:600kHz，1.2MHz 电流 - 输出:1A 同步整流器:无 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:8-TSSOP，8-MSOP（0.118"，3.00mm 宽） 包装:管件 供应商设备封装:8-MSOP |
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