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参数资料
| 型号： | ISL97650BIRTZ-T |
| 厂商： | Intersil |
| 文件页数： | 5/20页 |
| 文件大小： | 0K |
| 描述： | IC LCD SUPPLY 4CHN 36-TQFN |
| 标准包装： | 4,000 |
| 应用： | LCD 电视机/监控器 |
| 电流 - 电源： | 250µA |
| 电源电压： | 4.2 V ~ 14 V |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 36-WFQFN 裸露焊盘 |
| 供应商设备封装： | 36-TQFN 裸露焊盘（6x6） |
| 包装： | 带卷 (TR) |
ISL97650B
Electrical Specifications
V IN = 12V, V BOOST = V SUP = 15V, V ON = 25V, V OFF = -8V, over temperature from -40°C to +105°C; Parameters
with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established
by characterization and are not production tested. (Continued)
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
FAULT DETECTION THRESHOLDS
T_off
Thermal Shut-Down (latched and reset
Temperature rising
150
°C
by power cycle or EN cycle)
Vth_A VDD (FBB)
A VDD Boost Short Detection
V(FBB) falling less than
0.9
V
Vth_V LOGIC (FBL) V LOGIC Buck Short Detection
V(FBL) falling less than
0.9
V
Vth_POUT(FBP)
Vth_NOUT(FBN)
t FD
P OUT Charge Pump Short Detection
N OUT Charge Pump Short Detection
Fault Delay Time to Chip Turns Off
V(FBP) falling less than
V(FBN) rising more than
0.9
0.4
52
V
V
ms
START-UP SEQUENCING
t START-UP
Enable to A VDD Start Time
C DEL = 220nF
80
ms
I DELB_ON
DELB Pull-Down Current or Resistance VDELB > 0.9V
36
50
70
μA
when Enabled by the Start-Up Sequence
VDELB < 0.9V
1.00
1.326
1.75
k Ω
I DELB_OFF
DELB Pull-Down Current or Resistance VDELB < 20V
500
nA
when Disabled
C DEL
Sequence Timing and Fault Time Out
10
220
nF
Capacitor
t VOFF
t VON
t VON-SLICE
A VDD to V OFF
V OFF to V ON Delay
V ON to V ON-SLICE Delay
C DEL = 220nF
C DEL = 220nF
C DEL = 220nF
9
20
17
ms
ms
ms
Typical Performance Curves
100
0.15
80
60
V IN = 5V
V IN = 12V
0.12
0.09
V IN = 5V
40
20
0.06
0.03
V IN = 12V
0
0
500
1000
1500
2000
2500
3000
0.00
0
300
600
900
1200
1500
I O (mA)
FIGURE 1. BOOST EFFICIENCY
5
I O (mA)
FIGURE 2. BOOST LOAD REGULATION
FN6748.1
March 22, 2010
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