参数资料
型号: ISL97672BIRZ-T
厂商: Intersil
文件页数: 4/16页
文件大小: 0K
描述: IC LED DRVR BACKLIGHT 20QFN
标准包装: 6,000
拓扑: PWM,升压(升压)
输出数: 6
内部驱动器:
类型 - 主要: 背光
频率: 200kHz ~ 1.5MHz
电源电压: 4.5 V ~ 26.5 V
输出电压: 45V
安装类型: 表面贴装
封装/外壳: 20-VFQFN 裸露焊盘
供应商设备封装: 20-QFN(3x4)
包装: 带卷 (TR)
工作温度: -40°C ~ 85°C
ISL97672B
Absolute Maximum Ratings (T A = +25°C)
VIN, EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 28V
FAULT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VIN - 8.5V to VIN + 0.3V
VDC, COMP, RSET, PWM, OVP, FSW . . . . . . . . . . . . . . . . . . . . . -0.3V to 5.5V
CH0 - CH5, LX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 45V
PGND, AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 0.3V
NOTE: Voltage ratings are with respect to AGND pin.
ESD Rating
Human Body Model (Tested per JESD22-A114E) . . . . . . . . . . . . . . . . 3kV
Machine Model (Tested per JESD22-A115-A) . . . . . . . . . . . . . . . . . 300V
Charged Device Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1kV
Thermal Information
Thermal Resistance (Typical) θ JA (°C/W) θ JC (°C/W)
20 Ld QFN Package (Notes 4, 5, 7) . . . . . . 40 2.5
Thermal Characterization (Typical) PSI JT (°C/W)
20 Ld QFN Package (Note 6) . . . . . . . . . . . . . . . . . . . . . 1
Maximum Continuous Junction Temperature . . . . . . . . . . . . . . . . .+125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Latch Up (Tested per JESD-78B; Class 2, Level A) . . . . . . . . . . . . . . 100mA
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. θ JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379 .
5. For θ JC , the “case temp” location is the center of the exposed metal pad on the package underside.
6. PSI JT is the junction-to-top thermal resistance. If the package top temperature can be measured, with this rating then the die junction temperature
can be estimated more accurately than the θ JA and θ JC thermal resistance ratings.
7. Refer to JESD51-7 high effective thermal conductivity board layout for proper via and plane designs.
Electrical Specifications All specifications are tested at T A = +25°C, V IN = 12V, EN = 5V, R SET = 20.1k Ω , unless otherwise noted. Boldface
limits apply over the operating junction temperature range, -40°C to +85°C.
MIN
MAX
PARAMETER
DESCRIPTION
CONDITION
(Note 8)
TYP
(Note 8)
UNIT
GENERAL
V IN (Note 10)
IVIN
IVIN_STBY
V OUT
VIN Supply Voltage
VIN Current
VIN Shutdown Current
Output Voltage
T C = <+60°C
T A = +25°C
EN = 5V
T A = +25°C
4.5V < V IN ≤ 26V,
F SW = 600kHz
4.5
5
26.5
5
45
V
mA
μA
V
8.55V < V IN ≤ 26V,
F SW = 1.2MHz
4.5V < V IN ≤ 8.55V,
F SW = 1.2MHz
45
V IN /0.19
V
V
V UVLO
V UVLO_HYS
Undervoltage Lock-out Threshold
Undervoltage Lock-out Hysteresis
2.1
200
2.6
V
mV
ENABLE AND PWM GENERATOR
V IL
Guaranteed Range for PWM Input Low Voltage
0.8
V
V IH
FPWM
t ON
Guaranteed Range for PWM Input High Voltage
PWM Input Frequency Range
Minimum On Time
1.5
200
250
VDD
30,000
350
V
Hz
ns
4
FN7995.1
November 22, 2013
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