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参数资料
| 型号： | ISPLSI 1016EA-100LT44 |
| 厂商： | Lattice Semiconductor Corporation |
| 文件页数： | 1/13页 |
| 文件大小： | 0K |
| 描述： | IC PLD ISP 32I/O 100MHZ 44TQFP |
| 标准包装： | 160 |
| 系列： | ispLSI® 1000EA |
| 可编程类型： | 系统内可编程 |
| 最大延迟时间 tpd(1)： | 10.0ns |
| 电压电源 - 内部： | 4.75 V ~ 5.25 V |
| 逻辑元件/逻辑块数目： | 16 |
| 门数： | 2000 |
| 输入/输出数： | 32 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 44-TQFP |
| 供应商设备封装： | 44-TQFP（10x10） |
| 包装： | 托盘 |
| 其它名称： | ISPLSI1016EA-100LT44 |
ispLSI 1016EA
In-System Programmable High Density PLD
1016ea_02.1
1
USE
ispMA
CH
4A5
FOR
NEW
5V
DESIGNS
Features
HIGH-DENSITY PROGRAMMABLE LOGIC
— 2000 PLD Gates
— 32 I/O Pins, One Dedicated Input
— 96 Registers
— High-Speed Global Interconnect
— Wide Input Gating for Fast Counters, State
Machines, Address Decoders, etc.
— Small Logic Block Size for Random Logic
— Functionally Compatible with ispLSI 1016E
NEW FEATURES
— 100% IEEE 1149.1 Boundary Scan Testable
— ispJTAG In-System Programmable via IEEE 1149.1
(JTAG) Test Access Port
— User-Selectable 3.3V or 5V I/O Supports Mixed-
Voltage Systems (VCCIO Pin)
— Open-Drain Output Option
HIGH-PERFORMANCE E2CMOS TECHNOLOGY
—
fmax = 200 MHz Maximum Operating Frequency
—
tpd = 4.5 ns Propagation Delay
— TTL Compatible Inputs and Outputs
— Electrically Erasable and Reprogrammable
— Non-Volatile
— 100% Tested at Time of Manufacture
— Unused Product Term Shutdown Saves Power
IN-SYSTEM PROGRAMMABLE
— Increased Manufacturing Yields, Reduced Time-to-
Market and Improved Product Quality
— Reprogram Soldered Device for Faster Prototyping
OFFERS THE EASE OF USE AND FAST SYSTEM
SPEED OF PLDs WITH THE DENSITY AND FLEXIBILITY
OF FIELD PROGRAMMABLE GATE ARRAYS
— Complete Programmable Device Can Combine Glue
Logic and Structured Designs
— Enhanced Pin Locking Capability
— Three Dedicated Clock Input Pins
— Synchronous and Asynchronous Clocks
— Programmable Output Slew Rate Control to
Minimize Switching Noise
— Flexible Pin Placement
— Optimized Global Routing Pool Provides Global
Interconnectivity
Functional Block Diagram
CLK
A0
A1
A2
A3
A4
A5
A6
A7
B
7
B
6
B
5
B
4
B
3
B
2
B
1
B
0
Output
Routing
Pool
Output
Routing
Pool
Global Routing Pool (GRP)
Logic
Array
DQ
GLB
0139C/1016EA
Description
The ispLSI 1016EA is a High Density Programmable
Logic Device containing 96 Registers, 32 Universal I/O
pins, one Dedicated Input pin, two Dedicated Clock Input
pins, one Global OE input pin and a Global Routing Pool
(GRP). The GRP provides complete interconnectivity
between all of these elements. The ispLSI 1016EA fea-
tures 5V in-system programmability (ISP) and in-system
diagnostic capabilities via an IEEE 1149.1 Test Access
Port. The ispLSI 1016EA offers non-volatile
reprogrammability of the logic, as well as the intercon-
nect to provide truly reconfigurable systems. A functional
superset of the ispLSI 1016 architecture, the ispLSI
1016EA device adds user-selectable 3.3V or 5V I/O and
open-drain output options.
The basic unit of logic on the ispLSI 1016EA device is the
Generic Logic Block (GLB). The GLBs are labeled A0,
A1...B7 (Figure 1). There are a total of 16 GLBs in the
ispLSI 1016EA device. Each GLB has 18 inputs, a
programmable AND/OR/Exclusive OR array, and four
outputs which can be configured to be either combinato-
rial or registered. Inputs to the GLB come from the GRP
and a dedicated input. All of the GLB outputs are brought
back into the GRP so that they can be connected to the
inputs of any other GLB on the device.
Copyright 2007 Lattice Semiconductor Corp. All brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject
to change without notice.
LATTICE SEMICONDUCTOR CORP., 5555 Northeast Moore Ct., Hillsboro, Oregon 97124, U.S.A.
Tel. (503) 268-8000; 1-800-LATTICE; FAX (503) 268-8556; http://www.latticesemi.com
April 2007
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISPLSI1016EA-100LT44 | 功能描述:CPLD - 复杂可编程逻辑器件 RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| ISPLSI1016EA-125LJ44 | 功能描述:CPLD - 复杂可编程逻辑器件 RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| ISPLSI1016EA-125LT44 | 功能描述:CPLD - 复杂可编程逻辑器件 RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| ISPLSI1016EA-200LJ44 | 功能描述:CPLD - 复杂可编程逻辑器件 RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| ISPLSI1016EA-200LT44 | 功能描述:CPLD - 复杂可编程逻辑器件 RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
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