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参数资料
型号： ISPLSI 2032A-110LJN44
厂商： Lattice Semiconductor Corporation
文件页数： 3/16页
文件大小： 0K
描述： IC PLD ISP 32I/O 10NS 44PLCC
标准包装： 26
系列： ispLSI® 2000A
可编程类型： 系统内可编程
最大延迟时间 tpd(1)： 10.0ns
电压电源 - 内部： 4.75 V ~ 5.25 V
逻辑元件/逻辑块数目： 8
宏单元数： 32
门数： 1000
输入/输出数： 32
工作温度： 0°C ~ 70°C
安装类型： 表面贴装
封装/外壳： 44-LCC（J 形引线）
供应商设备封装： 44-PLCC（16.58x16.58）
包装： 管件
其它名称： 220-1601-5
ISPLSI 2032A-110LJN44-ND
ISPLSI2032A-110LJN44
Specifications ispLSI 2032/A
11
USE
ispLSI
2032E
FOR
NEW
DESIGNS
Pin Description
1. NC pins are not to be connected to any active signals, VCC or GND.
2. Pins have dual function capability.
Input/Output Pins — These are the general purpose
I/O pins used by the logic array.
NAME
Table 2-0002A-08isp/2032
44-PIN PLCC
PIN NUMBERS
DESCRIPTION
15,
19,
25,
29,
37,
41,
3,
7,
16,
20,
26,
30,
38,
42,
4,
8,
17,
21,
27,
31,
39,
43,
5,
9,
I/O 0 - I/O 3
I/O 4 - I/O 7
I/O 8 - I/O 11
I/O 12 - I/O 15
I/O 16 - I/O 19
I/O 20 - I/O 23
I/O 24 - I/O 27
I/O 28 - I/O 31
18,
22,
28,
32,
40,
44,
6,
10
Global Output Enable input pin.
2
GOE 0
1,
23
GND
VCC
12, 34
17, 39
6,
28
18, 42
6,
30
VCC
No Connect.
12, 24, 36, 48
NC1
Ground (GND)
Input — This pin performs two functions. When
ispEN
is logic low, it functions as an input pin to load
programming data into the device. SDI/IN0 also is used
as one of the two control pins for the isp state machine.
When
ispEN is high, it functions as a dedicated input
pin.
Dedicated Clock input. This clock input is connected to
one of the clock inputs of all the GLBs on the device.
This pin performs two functions:
Input — Dedicated in-system programming enable
input pin. This pin is brought low to enable the
programming mode. The MODE, SDI, SDO and SCLK
controls become active.
RESET/Y1
Y0
SDI/IN 02
ispEN
MODE
Input — When in ISP Mode, controls operation of ISP
state machine.
- Dedicated clock input. This clock input is brought
into the Clock Distribution Network, and can optionally
be routed to any GLB and/or I/O cell on the device.
Output/Input — This pin performs two functions. When
ispEN is logic low, it functions as an output pin to read
serial shift register data. When
ispEN is high, it
functions as a dedicated input pin.
SDO/IN 12
Input — This pin performs two functions. When
ispEN is logic low, it functions as a clock pin for the
Serial Shift Register. When
ispEN is high, it
functions as a dedicated clock input. This clock input
is brought into the Clock Distribution Network and
can be routed to any GLB and/or I/O cell on the
device.
SCLK/Y22
- Active Low (0) Reset pin which resets all of the GLB
and I/O registers in the device.
35
11
14
13
36
24
33
44-PIN TQFP
PIN NUMBERS
48-PIN TQFP
PIN NUMBERS
9,
13,
19,
23,
31
35,
41,
1,
10,
14,
20,
24,
32,
36,
42,
2,
11,
15,
21,
25,
33,
37,
43,
3,
12,
16,
22,
26,
34,
38,
44,
4
40
5
29
7
8
30
18
27
9,
14,
20,
25,
33,
38,
44,
1,
10,
15,
21,
26,
34,
39,
45,
2,
11,
16,
22,
27,
35,
40,
46,
3,
13,
17,
23,
28,
37,
41,
47,
4
43
5
31
7
8
32
19
29
Select
devices
have
been
discontinued.
See
Ordering
Information
section
for
product
status.
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相关代理商/技术参数
参数描述
ispLSI2032A-110LJN44 功能描述:CPLD - 复杂可编程逻辑器件 USE ispMACH 4000V RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100
ispLSI2032A-110LT44 功能描述:CPLD - 复杂可编程逻辑器件 USE ispMACH 4000V RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100
ISPLSI2032A-110LT44I 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:In-System Programmable High Density PLD
ispLSI2032A-110LT48 功能描述:CPLD - 复杂可编程逻辑器件 USE ispMACH 4000V RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100
ISPLSI2032A-110LT48I 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:In-System Programmable High Density PLD
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