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| 型号： | ISPPAC-POWR6AT6-01SN32I |
| 厂商： | Lattice Semiconductor Corporation |
| 文件页数： | 1/35页 |
| 文件大小： | 0K |
| 描述： | IC PWR MANAGER ISP GP 32-QFNS |
| 产品培训模块： | Power and Board Management Solutions |
| 标准包装： | 490 |
| 系列： | ispPAC® |
| 应用： | 电源控制器/监控器 |
| 输入电压： | -0.3 V ~ 5.9 V |
| 电源电压： | 2.8 V ~ 3.96 V |
| 电流 - 电源： | 10mA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-VFQFN 裸露焊盘 |
| 供应商设备封装： | 32-QFNS（5x5） |
| 包装： | 托盘 |
| 其它名称： | 220-1360 ISPPAC-POWR6AT6-01SN32I-ND |
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ispPAC-POWR6AT6
?
In-System Programmable Power Supply
Monitoring and Margining Controller
December 2008
Features
Data Sheet DS1016
Application Block Diagram
■ Power Supply Margin and Trim Functions
? Trim and margin up to six power supplies
? Dynamic voltage control through I 2 C
3.3 V
V o u t
Trim
V o u t
?
?
Four hardware selectable voltage pro?les
Independent Digital Closed-Loop Trim function
2.5 V
Trim
for each output
■ Analog Input Monitoring
? Six analog monitor inputs
? Differential input architecture for accurate
1. 8V
POL#1
V o u t
Trim
V o u t
Trim
remote ground sensing
? 10-bit ADC for direct voltage measurements
POL#2
V o u t
■ 2-Wire (I 2 C/SMBus? Compatible) Interface
? Readout of the ADC
? Dynamic trimming/margining control
■ Other Features
?
Programmable analog circuitry
POL#3
Trim
V o u t
Trim
?
?
?
Wide supply range, 2.8V to 3.96V
In-system programmable through JTAG
Industrial temperature range: -40°C to +85°C
6 Analog
Trim O u tp u ts
6 Analog
Monitor Inp u ts
I 2 C
? 32-pin QFNS (Quad Flat-pack, No lead, Saw-
singulated) package 1 , only 5mm x 5mm, lead-
free option
Description
Lattice’s Power Manager II ispPAC-POWR6AT6 is a
general-purpose power-supply monitoring and margin-
ing controller, incorporating in-system programmable
ADC
Po w er S u pply
Margin/Trim
Control
Interface
ispPAC-POWR6AT6
CPU
I 2 C
B u s
analog functions implemented in non-volatile E 2 CMOS ?
technology. The ispPAC-POWR6AT6 device provides
six independent analog input channels to monitor up to
six power supply test points. Each of these input chan-
nels offers a differential input to support remote ground
sensing.
The ispPAC-POWR6AT6 incorporates six DACs for gen-
erating a trimming voltage to control the output voltage
of a power supply. The trimming voltage can be set to
four hardware selectable preset values (voltage pro?les)
or can be dynamically loaded in to the DAC through the
I 2 C bus. Additionally, each power supply output voltage
can be maintained within 1% tolerance across various
load conditions using the Digital Closed Loop Control
mode. The operating voltage pro?le can be selected
using external hardware pins.
The on-chip 10-bit A/D converter can both be used to
monitor the V MON voltage through the I 2 C bus as well as
for implementing digital closed loop mode for maintain-
ing the output voltage of all power supplies controlled by
the monitoring and trimming section of the ispPAC-
POWR6AT6 device.
The I 2 C bus/SMBus interface allows an external micro-
controller to measure the voltages connected to the
V MON analog monitor inputs and load the DACs for the
generation of the trimming voltages of the external DC-
DC converters.
1. Use 32-pin QFNS package for all new designs. Refer to PCN
#13A-08 for 32-pin QFN package discontinuance.
? 2008 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other
brand or product names are trademarks or registered trademarks of their respective holders. The speci?cations and information herein are subject to change without
notice.
www.latticesemi.com
3-1
DS1016_01.3
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